rcw fixes

1. Set IRQs, EVT and others as GPIOs
2. Enables Serdes group 2 to neogotiate PCIe gen3
3. Set SPI divisor to 28 to meet 700MHz fabric clock
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>

patches/rcw/0002-Set-io-pads-as-GPIO.patch

+From b184697cff85d8f98e765014309b97444ff1c5b7 Mon Sep 17 00:00:00 2001
+From: Rabeeh Khoury <rabeeh@solid-run.com>
+Date: Wed, 30 Oct 2019 11:43:37 +0200
+Subject: [PATCH 2/2] Set io pads as GPIO
+
+Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
+---
+ lx2160acex7/configs/lx2160a_defaults.rcwi | 9 +++++++--
+ 1 file changed, 7 insertions(+), 2 deletions(-)
+
+diff --git a/lx2160acex7/configs/lx2160a_defaults.rcwi b/lx2160acex7/configs/lx2160a_defaults.rcwi
+index 6fd65ec..dbc843f 100644
+--- a/lx2160acex7/configs/lx2160a_defaults.rcwi
++++ b/lx2160acex7/configs/lx2160a_defaults.rcwi
+@@ -9,11 +9,16 @@ HWA_CGA_M1_CLK_SEL=1
+ HWA_CGB_M1_CLK_SEL=7
+ BOOT_LOC=26
+ SYSCLK_FREQ=600
+-IIC2_PMUX=6
++IIC2_PMUX=1
+ IIC3_PMUX=0
+ IIC4_PMUX=2
+ USB3_CLK_FSEL=39
+ SRDS_DIV_PEX_S1=1
+ SRDS_DIV_PEX_S2=3
+ SRDS_DIV_PEX_S3=1
+-
++SDHC1_DIR_PMUX=1
++IRQ03_00_PMUX=1
++IRQ07_04_PMUX=1
++IRQ11_08_PMUX=1
++EVT20_PMUX=1
++EVT43_PMUX=1
+-- 
+2.17.1
+

patches/rcw/0003-S2-enable-gen3-xspi-increase-divisor-to-28.patch

+From 3b0e8b6e242549c2ed992d7556d7966a77b6da86 Mon Sep 17 00:00:00 2001
+From: Rabeeh Khoury <rabeeh@solid-run.com>
+Date: Tue, 5 Nov 2019 10:35:32 +0200
+Subject: [PATCH] S2 - enable gen3, xspi increase divisor to 28
+
+Serdes group 2 enable PCIe gen 3
+XSPI increase divisor to 28 - this fixes UEFI SPI flash detection.
+
+Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
+---
+ lx2160acex7/configs/lx2160a_defaults.rcwi | 2 +-
+ lx2160acex7/configs/lx2160a_xspiboot.rcwi | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/lx2160acex7/configs/lx2160a_defaults.rcwi b/lx2160acex7/configs/lx2160a_defaults.rcwi
+index dbc843f..3ea7683 100644
+--- a/lx2160acex7/configs/lx2160a_defaults.rcwi
++++ b/lx2160acex7/configs/lx2160a_defaults.rcwi
+@@ -14,7 +14,7 @@ IIC3_PMUX=0
+ IIC4_PMUX=2
+ USB3_CLK_FSEL=39
+ SRDS_DIV_PEX_S1=1
+-SRDS_DIV_PEX_S2=3
++SRDS_DIV_PEX_S2=1
+ SRDS_DIV_PEX_S3=1
+ SDHC1_DIR_PMUX=1
+ IRQ03_00_PMUX=1
+diff --git a/lx2160acex7/configs/lx2160a_xspiboot.rcwi b/lx2160acex7/configs/lx2160a_xspiboot.rcwi
+index eecc314..28310c9 100644
+--- a/lx2160acex7/configs/lx2160a_xspiboot.rcwi
++++ b/lx2160acex7/configs/lx2160a_xspiboot.rcwi
+@@ -14,4 +14,4 @@
+ #include <../lx2160asi/common.rcw>
+ 
+ /* Modify FlexSPI Clock Divisor value */
+-#include <../lx2160asi/flexspi_divisor_24.rcw>
++#include <../lx2160asi/flexspi_divisor_28.rcw>
+-- 
+2.17.1
+