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Boxiang Sun
lx2160a_build
Commits
ddab3ad5
Commit
ddab3ad5
authored
May 11, 2022
by
Rabeeh Khoury
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Fixed mistkenly swapped PLLF and PLLS on standard SD1 protocol #8
Signed-off-by:
Rabeeh Khoury
<
rabeeh@solid-run.com
>
parent
da618fe6
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patches/rcw-LSDK-21.08/0017-lx2160acex7-mode-8-use-external-PLLs.patch
...SDK-21.08/0017-lx2160acex7-mode-8-use-external-PLLs.patch
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patches/rcw-LSDK-21.08/0017-lx2160acex7-mode-8-use-external-PLLs.patch
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da618fe6
From 89be982a78fd1767a7c9f36147df91969293387d Mon Sep 17 00:00:00 2001
From: Josua Mayer <josua@solid-run.com>
Date: Sun, 27 Mar 2022 13:37:03 +0300
Subject: [PATCH 17/18] lx2160acex7: mode 8: use external PLLs
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
lx2160acex7/configs/lx2160a_SD1_8.rcwi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/lx2160acex7/configs/lx2160a_SD1_8.rcwi b/lx2160acex7/configs/lx2160a_SD1_8.rcwi
index abd6dfd..0dab1c4 100644
--- a/lx2160acex7/configs/lx2160a_SD1_8.rcwi
+++ b/lx2160acex7/configs/lx2160a_SD1_8.rcwi
@@ -1,4 +1,4 @@
SRDS_PRTCL_S1=8 /* should be 8 */
-SRDS_INTRA_REF_CLK_S1 = 1 /* PLLF used for PLLS */
+/*SRDS_INTRA_REF_CLK_S1 = 1*/ /* PLLF used for PLLS */
SRDS_PLL_REF_CLK_SEL_S1=2
-SRDS_PLL_PD_PLL1=1
+/*SRDS_PLL_PD_PLL1=1*/
--
2.34.1
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