Xtt display of signal and channel status, Co channels added

xtt/lib/xtt/src/xtt_item.cpp

@@ -2195,7 +2195,8 @@ static void xnav_set_sigchan_flags( XNavBrow *brow, pwr_tAttrRef *arp, pwr_tCid
   case pwr_cClass_ChanAit:
   case pwr_cClass_ChanAo:
   case pwr_cClass_ChanIi:
-  case pwr_cClass_ChanIo: {
+  case pwr_cClass_ChanIo:
+  case pwr_cClass_ChanCo: {
     break;
   }
   default:
@@ -2307,6 +2308,25 @@ static void xnav_set_sigchan_flags( XNavBrow *brow, pwr_tAttrRef *arp, pwr_tCid
     test = 0;
     break;
   }
+  case pwr_cClass_Ssab_CO4uP: {
+    pwr_tMask convmask, mask;
+
+    unsigned int chan_idx = (chanaref.Offset - offsetof(pwr_sClass_Ssab_CO4uP,Ch1)) / pwr_AlignLW(sizeof(pwr_sClass_ChanCo));
+
+    aref = cdh_ObjidToAref( chanaref.Objid);
+    sts = gdh_ArefANameToAref( &aref, "ConvMask", &aref);
+    if ( EVEN(sts)) return;
+
+    sts = gdh_GetObjectInfoAttrref( &aref, &convmask, sizeof(convmask));
+    if ( EVEN(sts)) return;
+
+    mask = 1 << chan_idx;
+
+    conv = convmask & mask ? 1 : 0;
+    inv = 0;
+    test = 0;
+    break;
+  }
   case pwr_cClass_Ssab_DO32DKS:
   case pwr_cClass_Ssab_DO32DKS_Stall: {
     pwr_tMask invmask, testmask, mask;
@@ -2431,6 +2451,7 @@ static void xnav_set_sigchan_flags( XNavBrow *brow, pwr_tAttrRef *arp, pwr_tCid
       break;
     case pwr_cClass_ChanAi:
     case pwr_cClass_ChanIi:
+    case pwr_cClass_ChanCo:
       sts = gdh_ArefANameToAref( &chanaref, "ConversionOn", &aref);
       if ( EVEN(sts)) {
 	brow_SetAnnotPixmap( node, annot, brow->pixmap_offline);

xtt/lib/xtt/src/xtt_ssaboxclasses.h

@@ -68,4 +68,39 @@ typedef struct {
 
 #endif
 
+#ifndef pwr_cClass_Ssab_CO4uP
+#define pwr_cClass_Ssab_CO4uP 4194631752UL
+
+typedef struct {
+  pwr_tString80                       Description pwr_dAlignLW;
+  pwr_tString40                       DevName pwr_dAlignW;
+  pwr_tUInt32                         ErrorCount pwr_dAlignW;
+  pwr_tUInt32                         ErrorSoftLimit pwr_dAlignW;
+  pwr_tUInt32                         ErrorHardLimit pwr_dAlignW;
+  pwr_tMask                           ConvMask pwr_dAlignW;
+  pwr_tUInt16                         MaxNoOfCounters pwr_dAlignW;
+  pwr_tBoolean                        COAbsFlag[4] pwr_dAlignW;
+  pwr_tEnum             	      NoOfBits[4] pwr_dAlignW;
+  pwr_tBoolean                        COWrFlag[4] pwr_dAlignW;
+  pwr_tEnum             	      MulCount[4] pwr_dAlignW;
+  pwr_tEnum             	      DivCount[4] pwr_dAlignW;
+  pwr_tBoolean                        CopWrRough[4] pwr_dAlignW;
+  pwr_tBoolean                        CopWrFine[4] pwr_dAlignW;
+  pwr_tBoolean                        LoadWrReg[4] pwr_dAlignW;
+  pwr_tBoolean                        LengthMeasurement[4] pwr_dAlignW;
+  pwr_tBoolean                        SpeedMeasurement[4] pwr_dAlignW;
+  pwr_tUInt32                         SyncRawValue[4] pwr_dAlignW;
+  pwr_tUInt32                         RegAddress pwr_dAlignW;
+  pwr_tUInt32                         VectAddress pwr_dAlignW;
+  pwr_tIoProcessMask                  Process pwr_dAlignW;
+  pwr_tObjid                          ThreadObject pwr_dAlignW;
+  pwr_tURL                            DataSheet pwr_dAlignW;
+  pwr_sClass_ChanCo                   Ch1 pwr_dAlignLW;
+  pwr_sClass_ChanCo                   Ch2 pwr_dAlignLW;
+  pwr_sClass_ChanCo                   Ch3 pwr_dAlignLW;
+  pwr_sClass_ChanCo                   Ch4 pwr_dAlignLW;
+} pwr_sClass_Ssab_CO4uP;
+
+#endif
+
 #endif