Commit 40745a57 authored by Russ Cox's avatar Russ Cox

5l: delete pre-ARMv4 instruction implementations

Add implementation for addr<->reg short moves.
Align large data, for ARM.

R=ken2
CC=golang-dev
https://golang.org/cl/4545050
parent d84415d8
...@@ -1046,40 +1046,6 @@ if(debug['G']) print("%ux: %s: arm %d %d %d\n", (uint32)(p->pc), p->from.sym->na ...@@ -1046,40 +1046,6 @@ if(debug['G']) print("%ux: %s: arm %d %d %d\n", (uint32)(p->pc), p->from.sym->na
o1 |= 1<<22; o1 |= 1<<22;
break; break;
case 22: /* movb/movh/movhu O(R),R -> lr,shl,shr */
aclass(&p->from);
r = p->from.reg;
if(r == NREG)
r = o->param;
o1 = olr(instoffset, r, p->to.reg, p->scond);
o2 = oprrr(ASLL, p->scond);
o3 = oprrr(ASRA, p->scond);
r = p->to.reg;
if(p->as == AMOVB) {
o2 |= (24<<7)|(r)|(r<<12);
o3 |= (24<<7)|(r)|(r<<12);
} else {
o2 |= (16<<7)|(r)|(r<<12);
if(p->as == AMOVHU)
o3 = oprrr(ASRL, p->scond);
o3 |= (16<<7)|(r)|(r<<12);
}
break;
case 23: /* movh/movhu R,O(R) -> sb,sb */
aclass(&p->to);
r = p->to.reg;
if(r == NREG)
r = o->param;
o1 = osr(AMOVH, p->from.reg, instoffset, r, p->scond);
o2 = oprrr(ASRL, p->scond);
o2 |= (8<<7)|(p->from.reg)|(REGTMP<<12);
o3 = osr(AMOVH, REGTMP, instoffset+1, r, p->scond);
break;
case 30: /* mov/movb/movbu R,L(R) */ case 30: /* mov/movb/movbu R,L(R) */
o1 = omvl(p, &p->to, REGTMP); o1 = omvl(p, &p->to, REGTMP);
if(!o1) if(!o1)
...@@ -1093,7 +1059,6 @@ if(debug['G']) print("%ux: %s: arm %d %d %d\n", (uint32)(p->pc), p->from.sym->na ...@@ -1093,7 +1059,6 @@ if(debug['G']) print("%ux: %s: arm %d %d %d\n", (uint32)(p->pc), p->from.sym->na
break; break;
case 31: /* mov/movbu L(R),R -> lr[b] */ case 31: /* mov/movbu L(R),R -> lr[b] */
case 32: /* movh/movb L(R),R -> lr[b] */
o1 = omvl(p, &p->from, REGTMP); o1 = omvl(p, &p->from, REGTMP);
if(!o1) if(!o1)
break; break;
...@@ -1103,53 +1068,6 @@ if(debug['G']) print("%ux: %s: arm %d %d %d\n", (uint32)(p->pc), p->from.sym->na ...@@ -1103,53 +1068,6 @@ if(debug['G']) print("%ux: %s: arm %d %d %d\n", (uint32)(p->pc), p->from.sym->na
o2 = olrr(REGTMP,r, p->to.reg, p->scond); o2 = olrr(REGTMP,r, p->to.reg, p->scond);
if(p->as == AMOVBU || p->as == AMOVB) if(p->as == AMOVBU || p->as == AMOVB)
o2 |= 1<<22; o2 |= 1<<22;
if(o->type == 31)
break;
o3 = oprrr(ASLL, p->scond);
if(p->as == AMOVBU || p->as == AMOVHU)
o4 = oprrr(ASRL, p->scond);
else
o4 = oprrr(ASRA, p->scond);
r = p->to.reg;
o3 |= (r)|(r<<12);
o4 |= (r)|(r<<12);
if(p->as == AMOVB || p->as == AMOVBU) {
o3 |= (24<<7);
o4 |= (24<<7);
} else {
o3 |= (16<<7);
o4 |= (16<<7);
}
break;
case 33: /* movh/movhu R,L(R) -> sb, sb */
o1 = omvl(p, &p->to, REGTMP);
if(!o1)
break;
r = p->to.reg;
if(r == NREG)
r = o->param;
o2 = osrr(p->from.reg, REGTMP, r, p->scond);
o2 |= (1<<22) ;
o3 = oprrr(ASRL, p->scond);
o3 |= (8<<7)|(p->from.reg)|(p->from.reg<<12);
o3 |= (1<<6); /* ROR 8 */
o4 = oprrr(AADD, p->scond);
o4 |= (REGTMP << 12) | (REGTMP << 16);
o4 |= immrot(1);
o5 = osrr(p->from.reg, REGTMP,r,p->scond);
o5 |= (1<<22);
o6 = oprrr(ASRL, p->scond);
o6 |= (24<<7)|(p->from.reg)|(p->from.reg<<12);
o6 |= (1<<6); /* ROL 8 */
break; break;
case 34: /* mov $lacon,R */ case 34: /* mov $lacon,R */
...@@ -1360,54 +1278,12 @@ if(debug['G']) print("%ux: %s: arm %d %d %d\n", (uint32)(p->pc), p->from.sym->na ...@@ -1360,54 +1278,12 @@ if(debug['G']) print("%ux: %s: arm %d %d %d\n", (uint32)(p->pc), p->from.sym->na
break; break;
case 65: /* mov/movbu addr,R */ case 65: /* mov/movbu addr,R */
case 66: /* movh/movhu/movb addr,R */
o1 = omvl(p, &p->from, REGTMP); o1 = omvl(p, &p->from, REGTMP);
if(!o1) if(!o1)
break; break;
o2 = olr(0, REGTMP, p->to.reg, p->scond); o2 = olr(0, REGTMP, p->to.reg, p->scond);
if(p->as == AMOVBU || p->as == AMOVB) if(p->as == AMOVBU || p->as == AMOVB)
o2 |= 1<<22; o2 |= 1<<22;
if(o->type == 65)
break;
o3 = oprrr(ASLL, p->scond);
if(p->as == AMOVBU || p->as == AMOVHU)
o4 = oprrr(ASRL, p->scond);
else
o4 = oprrr(ASRA, p->scond);
r = p->to.reg;
o3 |= (r)|(r<<12);
o4 |= (r)|(r<<12);
if(p->as == AMOVB || p->as == AMOVBU) {
o3 |= (24<<7);
o4 |= (24<<7);
} else {
o3 |= (16<<7);
o4 |= (16<<7);
}
break;
case 67: /* movh/movhu R,addr -> sb, sb */
o1 = omvl(p, &p->to, REGTMP);
if(!o1)
break;
o2 = osr(p->as, p->from.reg, 0, REGTMP, p->scond);
o3 = oprrr(ASRL, p->scond);
o3 |= (8<<7)|(p->from.reg)|(p->from.reg<<12);
o3 |= (1<<6); /* ROR 8 */
o4 = oprrr(AADD, p->scond);
o4 |= (REGTMP << 12) | (REGTMP << 16);
o4 |= immrot(1);
o5 = osr(p->as, p->from.reg, 0, REGTMP, p->scond);
o6 = oprrr(ASRL, p->scond);
o6 |= (24<<7)|(p->from.reg)|(p->from.reg<<12);
o6 |= (1<<6); /* ROL 8 */
break; break;
case 68: /* floating point store -> ADDR */ case 68: /* floating point store -> ADDR */
...@@ -1628,6 +1504,22 @@ if(debug['G']) print("%ux: %s: arm %d %d %d\n", (uint32)(p->pc), p->from.sym->na ...@@ -1628,6 +1504,22 @@ if(debug['G']) print("%ux: %s: arm %d %d %d\n", (uint32)(p->pc), p->from.sym->na
o1 |= p->to.reg << 12; o1 |= p->to.reg << 12;
o1 |= (p->scond & C_SCOND) << 28; o1 |= (p->scond & C_SCOND) << 28;
break; break;
case 93: /* movb/movh/movhu addr,R -> ldrsb/ldrsh/ldrh */
o1 = omvl(p, &p->from, REGTMP);
if(!o1)
break;
o2 = olhr(0, REGTMP, p->to.reg, p->scond);
if(p->as == AMOVB)
o2 ^= (1<<5)|(1<<6);
else if(p->as == AMOVH)
o2 ^= (1<<6);
break;
case 94: /* movh/movhu R,addr -> strh */
o1 = omvl(p, &p->to, REGTMP);
if(!o1)
break;
o2 = oshr(p->from.reg, 0, REGTMP, p->scond);
break;
} }
out[0] = o1; out[0] = o1;
......
...@@ -219,7 +219,7 @@ main(int argc, char *argv[]) ...@@ -219,7 +219,7 @@ main(int argc, char *argv[])
elfinit(); elfinit();
HEADR = ELFRESERVE; HEADR = ELFRESERVE;
if(INITTEXT == -1) if(INITTEXT == -1)
INITTEXT = 0x8000 + HEADR; INITTEXT = 0x10000 + HEADR;
if(INITDAT == -1) if(INITDAT == -1)
INITDAT = 0; INITDAT = 0;
if(INITRND == -1) if(INITRND == -1)
......
...@@ -117,18 +117,6 @@ Optab optab[] = ...@@ -117,18 +117,6 @@ Optab optab[] =
{ AMOVBU, C_SAUTO,C_NONE, C_REG, 21, 4, REGSP }, { AMOVBU, C_SAUTO,C_NONE, C_REG, 21, 4, REGSP },
{ AMOVBU, C_SOREG,C_NONE, C_REG, 21, 4, 0 }, { AMOVBU, C_SOREG,C_NONE, C_REG, 21, 4, 0 },
{ AMOVB, C_SAUTO,C_NONE, C_REG, 22, 12, REGSP },
{ AMOVB, C_SOREG,C_NONE, C_REG, 22, 12, 0 },
{ AMOVH, C_SAUTO,C_NONE, C_REG, 22, 12, REGSP },
{ AMOVH, C_SOREG,C_NONE, C_REG, 22, 12, 0 },
{ AMOVHU, C_SAUTO,C_NONE, C_REG, 22, 12, REGSP },
{ AMOVHU, C_SOREG,C_NONE, C_REG, 22, 12, 0 },
{ AMOVH, C_REG, C_NONE, C_SAUTO, 23, 12, REGSP },
{ AMOVH, C_REG, C_NONE, C_SOREG, 23, 12, 0 },
{ AMOVHU, C_REG, C_NONE, C_SAUTO, 23, 12, REGSP },
{ AMOVHU, C_REG, C_NONE, C_SOREG, 23, 12, 0 },
{ AMOVW, C_REG, C_NONE, C_LAUTO, 30, 8, REGSP, LTO }, { AMOVW, C_REG, C_NONE, C_LAUTO, 30, 8, REGSP, LTO },
{ AMOVW, C_REG, C_NONE, C_LOREG, 30, 8, 0, LTO }, { AMOVW, C_REG, C_NONE, C_LOREG, 30, 8, 0, LTO },
{ AMOVW, C_REG, C_NONE, C_ADDR, 64, 8, 0, LTO }, { AMOVW, C_REG, C_NONE, C_ADDR, 64, 8, 0, LTO },
...@@ -146,23 +134,6 @@ Optab optab[] = ...@@ -146,23 +134,6 @@ Optab optab[] =
{ AMOVBU, C_LOREG,C_NONE, C_REG, 31, 8, 0, LFROM }, { AMOVBU, C_LOREG,C_NONE, C_REG, 31, 8, 0, LFROM },
{ AMOVBU, C_ADDR, C_NONE, C_REG, 65, 8, 0, LFROM }, { AMOVBU, C_ADDR, C_NONE, C_REG, 65, 8, 0, LFROM },
{ AMOVB, C_LAUTO,C_NONE, C_REG, 32, 16, REGSP, LFROM },
{ AMOVB, C_LOREG,C_NONE, C_REG, 32, 16, 0, LFROM },
{ AMOVB, C_ADDR, C_NONE, C_REG, 66, 16, 0, LFROM },
{ AMOVH, C_LAUTO,C_NONE, C_REG, 32, 16, REGSP, LFROM },
{ AMOVH, C_LOREG,C_NONE, C_REG, 32, 16, 0, LFROM },
{ AMOVH, C_ADDR, C_NONE, C_REG, 66, 16, 0, LFROM },
{ AMOVHU, C_LAUTO,C_NONE, C_REG, 32, 16, REGSP, LFROM },
{ AMOVHU, C_LOREG,C_NONE, C_REG, 32, 16, 0, LFROM },
{ AMOVHU, C_ADDR, C_NONE, C_REG, 66, 16, 0, LFROM },
{ AMOVH, C_REG, C_NONE, C_LAUTO, 33, 24, REGSP, LTO },
{ AMOVH, C_REG, C_NONE, C_LOREG, 33, 24, 0, LTO },
{ AMOVH, C_REG, C_NONE, C_ADDR, 67, 24, 0, LTO },
{ AMOVHU, C_REG, C_NONE, C_LAUTO, 33, 24, REGSP, LTO },
{ AMOVHU, C_REG, C_NONE, C_LOREG, 33, 24, 0, LTO },
{ AMOVHU, C_REG, C_NONE, C_ADDR, 67, 24, 0, LTO },
{ AMOVW, C_LACON,C_NONE, C_REG, 34, 8, REGSP, LFROM }, { AMOVW, C_LACON,C_NONE, C_REG, 34, 8, REGSP, LFROM },
{ AMOVW, C_PSR, C_NONE, C_REG, 35, 4, 0 }, { AMOVW, C_PSR, C_NONE, C_REG, 35, 4, 0 },
...@@ -224,15 +195,21 @@ Optab optab[] = ...@@ -224,15 +195,21 @@ Optab optab[] =
{ AMOVH, C_REG, C_NONE, C_LAUTO, 72, 8, REGSP, LTO|V4 }, { AMOVH, C_REG, C_NONE, C_LAUTO, 72, 8, REGSP, LTO|V4 },
{ AMOVH, C_REG, C_NONE, C_LOREG, 72, 8, 0, LTO|V4 }, { AMOVH, C_REG, C_NONE, C_LOREG, 72, 8, 0, LTO|V4 },
{ AMOVH, C_REG, C_NONE, C_ADDR, 94, 8, 0, LTO|V4 },
{ AMOVHU, C_REG, C_NONE, C_LAUTO, 72, 8, REGSP, LTO|V4 }, { AMOVHU, C_REG, C_NONE, C_LAUTO, 72, 8, REGSP, LTO|V4 },
{ AMOVHU, C_REG, C_NONE, C_LOREG, 72, 8, 0, LTO|V4 }, { AMOVHU, C_REG, C_NONE, C_LOREG, 72, 8, 0, LTO|V4 },
{ AMOVHU, C_REG, C_NONE, C_ADDR, 94, 8, 0, LTO|V4 },
{ AMOVB, C_LAUTO,C_NONE, C_REG, 73, 8, REGSP, LFROM|V4 }, { AMOVB, C_LAUTO,C_NONE, C_REG, 73, 8, REGSP, LFROM|V4 },
{ AMOVB, C_LOREG,C_NONE, C_REG, 73, 8, 0, LFROM|V4 }, { AMOVB, C_LOREG,C_NONE, C_REG, 73, 8, 0, LFROM|V4 },
{ AMOVB, C_ADDR, C_NONE, C_REG, 93, 8, 0, LFROM|V4 },
{ AMOVH, C_LAUTO,C_NONE, C_REG, 73, 8, REGSP, LFROM|V4 }, { AMOVH, C_LAUTO,C_NONE, C_REG, 73, 8, REGSP, LFROM|V4 },
{ AMOVH, C_LOREG,C_NONE, C_REG, 73, 8, 0, LFROM|V4 }, { AMOVH, C_LOREG,C_NONE, C_REG, 73, 8, 0, LFROM|V4 },
{ AMOVH, C_ADDR, C_NONE, C_REG, 93, 8, 0, LFROM|V4 },
{ AMOVHU, C_LAUTO,C_NONE, C_REG, 73, 8, REGSP, LFROM|V4 }, { AMOVHU, C_LAUTO,C_NONE, C_REG, 73, 8, REGSP, LFROM|V4 },
{ AMOVHU, C_LOREG,C_NONE, C_REG, 73, 8, 0, LFROM|V4 }, { AMOVHU, C_LOREG,C_NONE, C_REG, 73, 8, 0, LFROM|V4 },
{ AMOVHU, C_ADDR, C_NONE, C_REG, 93, 8, 0, LFROM|V4 },
{ ALDREX, C_SOREG,C_NONE, C_REG, 77, 4, 0 }, { ALDREX, C_SOREG,C_NONE, C_REG, 77, 4, 0 },
{ ASTREX, C_SOREG,C_REG, C_REG, 78, 4, 0 }, { ASTREX, C_SOREG,C_REG, C_REG, 78, 4, 0 },
......
...@@ -927,7 +927,7 @@ buildop(void) ...@@ -927,7 +927,7 @@ buildop(void)
{ {
int i, n, r; int i, n, r;
armv4 = !debug['h']; armv4 = 1;
for(i=0; i<C_GOK; i++) for(i=0; i<C_GOK; i++)
for(n=0; n<C_GOK; n++) for(n=0; n<C_GOK; n++)
xcmp[i][n] = cmp(n, i); xcmp[i][n] = cmp(n, i);
......
...@@ -804,6 +804,10 @@ dodata(void) ...@@ -804,6 +804,10 @@ dodata(void)
diag("%s: no size", s->name); diag("%s: no size", s->name);
t = 1; t = 1;
} }
if(t >= PtrSize)
t = rnd(t, PtrSize);
else if(t > 2)
t = rnd(t, 4);
if(t & 1) if(t & 1)
; ;
else if(t & 2) else if(t & 2)
...@@ -826,6 +830,10 @@ dodata(void) ...@@ -826,6 +830,10 @@ dodata(void)
diag("unexpected symbol type %d", s->type); diag("unexpected symbol type %d", s->type);
} }
t = s->size; t = s->size;
if(t >= PtrSize)
t = rnd(t, PtrSize);
else if(t > 2)
t = rnd(t, 4);
if(t & 1) if(t & 1)
; ;
else if(t & 2) else if(t & 2)
......
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