cmd/internal/obj/arm64: fix illegal 4-operand instructions accepted arm64 bug

Current assmbler accepts MUL* related instructions with 4 operands,
such as instruction "MUL R1, R2, R3, R4", which is illegal.

The fix adds an actual field informantion to Optab, which has value
of C_NONE, C_REG, etc, so assembler can use p.From3Type for checking
in oplook.

Add test cases.

Fixes #25059

Change-Id: I0656319383c460696b392197bf5960b987f8fc97
Reviewed-on: https://go-review.googlesource.com/109295Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>

src/cmd/asm/internal/asm/testdata/arm64.s

@@ -408,6 +408,7 @@ again:
 //		outcode($1, &$2, NREG, &$4);
 //	}
 	CSET	GT, R1	// e1d79f9a
+	CSETW	HI, R2	// e2979f1a
 //
 // CSEL/CSINC/CSNEG/CSINV
 //
@@ -416,17 +417,22 @@ again:
 //		outgcode($1, &$2, $6.reg, &$4, &$8);
 //	}
 	CSEL	LT, R1, R2, ZR	// 3fb0829a
+	CSELW	LT, R2, R3, R4	// 44b0831a
 	CSINC	GT, R1, ZR, R3	// 23c49f9a
 	CSNEG	MI, R1, R2, R3	// 234482da
 	CSINV	CS, R1, R2, R3	// CSINV HS, R1, R2, R3 // 232082da
+	CSINVW	MI, R2, ZR, R2	// 42409f5a
 
 //		LTYPES cond ',' reg ',' reg
 //	{
 //		outcode($1, &$2, $4.reg, &$6);
 //	}
 	CINC	EQ, R4, R9	// 8914849a
+	CINCW	PL, R2, ZR	// 5f44821a
 	CINV	PL, R11, R22	// 76418bda
+	CINVW	LS, R7, R13	// ed80875a
 	CNEG	LS, R13, R7	// a7858dda
+	CNEGW	EQ, R8, R13	// 0d15885a
 //
 // CCMN
 //

src/cmd/asm/internal/asm/testdata/arm64error.s

@@ -83,4 +83,8 @@ TEXT errors(SB),$0
 	VST1.P	[V1.B16], (R8)(R9<<1)                            // ERROR "invalid extended register"
 	VREV64	V1.H4, V2.H8                                     // ERROR "invalid arrangement"
 	VREV64	V1.D1, V2.D1                                     // ERROR "invalid arrangement"
+	ADD	R1, R2, R3, R4                                   // ERROR "illegal combination"
+	MADD	R1, R2, R3                                       // ERROR "illegal combination"
+	CINC	CS, R2, R3, R4                                   // ERROR "illegal combination"
+	CSEL	LT, R1, R2                                       // ERROR "illegal combination"
 	RET