// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree fragment for LS1028A QDS board, serdes 69xx
 *
 * Copyright 2019-2021 NXP
 *
 * Requires a LS1028A QDS board with lane B rework.
 * Requires a SCH-30842 card in slot 1 and a SCH-28021 card in slot 2.
 */

/dts-v1/;
/plugin/;

&mdio_slot1 {
	#address-cells = <1>;
	#size-cells = <0>;

	slot1_sgmii: ethernet-phy@2 {
		/* AQR112 */
		reg = <0x2>;
		compatible = "ethernet-phy-ieee802.3-c45";
	};
};

&enetc_port0 {
	phy-handle = <&slot1_sgmii>;
	phy-mode = "2500base-x";
	status = "okay";
};

&mdio_slot2 {
	#address-cells = <1>;
	#size-cells = <0>;

	/* 4 ports on VSC8514 */
	slot2_qsgmii0: ethernet-phy@8 {
		reg = <0x8>;
	};

	slot2_qsgmii1: ethernet-phy@9 {
		reg = <0x9>;
	};

	slot2_qsgmii2: ethernet-phy@a {
		reg = <0xa>;
	};

	slot2_qsgmii3: ethernet-phy@b {
		reg = <0xb>;
	};
};

&mscc_felix_ports {
	port@0 {
		status = "okay";
		phy-handle = <&slot2_qsgmii0>;
		phy-mode = "qsgmii";
		managed = "in-band-status";
	};

	port@1 {
		status = "okay";
		phy-handle = <&slot2_qsgmii1>;
		phy-mode = "qsgmii";
		managed = "in-band-status";
	};

	port@2 {
		status = "okay";
		phy-handle = <&slot2_qsgmii2>;
		phy-mode = "qsgmii";
		managed = "in-band-status";
	};

	port@3 {
		status = "okay";
		phy-handle = <&slot2_qsgmii3>;
		phy-mode = "qsgmii";
		managed = "in-band-status";
	};
};

&mscc_felix {
	status = "okay";
};
