// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
 * Copyright (C) 2022 Kontron Electronics GmbH
 */

/dts-v1/;

#include "imx8mm-kontron-osm-s.dtsi"

/ {
	model = "Kontron BL i.MX8MM OSM-S (N802X S)";
	compatible = "kontron,imx8mm-bl-osm-s", "kontron,imx8mm-osm-s", "fsl,imx8mm";

	aliases {
		ethernet1 = &usbnet;
	};

	/* fixed crystal dedicated to mcp2542fd */
	osc_can: clock-osc-can {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <40000000>;
		clock-output-names = "osc-can";
	};

	leds {
		compatible = "gpio-leds";

		led1 {
			label = "led1";
			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "heartbeat";
		};

		led2 {
			label = "led2";
			gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
		};

		led3 {
			label = "led3";
			gpios = <&gpio3 7 GPIO_ACTIVE_LOW>;
		};
	};

	pwm-beeper {
		compatible = "pwm-beeper";
		pwms = <&pwm2 0 5000 0>;
	};

	reg_rst_eth2: regulator-rst-eth2 {
		compatible = "regulator-fixed";
		gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-always-on;
		regulator-name = "rst-usb-eth2";
	};

	reg_vdd_5v: regulator-5v {
		compatible = "regulator-fixed";
		regulator-always-on;
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-name = "vdd-5v";
	};
};

&ecspi2 {
	status = "okay";

	can@0 {
		compatible = "microchip,mcp251xfd";
		reg = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_can>;
		clocks = <&osc_can>;
		interrupts-extended = <&gpio5 1 IRQ_TYPE_LEVEL_LOW>;
		/*
		 * Limit the SPI clock to 15 MHz to prevent issues
		 * with corrupted data due to chip errata.
		 */
		spi-max-frequency = <15000000>;
		vdd-supply = <&reg_vdd_3v3>;
		xceiver-supply = <&reg_vdd_5v>;
	};
};

&ecspi3 {
	status = "okay";

	eeram@0 {
		compatible = "microchip,48l640";
		reg = <0>;
		spi-max-frequency = <20000000>;
	};
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet_rgmii>;
	phy-connection-type = "rgmii-id";
	phy-handle = <&ethphy>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy: ethernet-phy@0 {
			compatible = "ethernet-phy-id4f51.e91b";
			reg = <0>;
			reset-assert-us = <10000>;
			reset-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
		};
	};
};

/*
 * Rename SoM signals according to board usage:
 *   GPIO_B_0      -> DIO1_OUT
 *   GPIO_B_1      -> DIO2_OUT
 */
&gpio1 {
	gpio-line-names = "", "GPIO_A_0", "", "GPIO_A_1",
			  "", "GPIO_A_2", "GPIO_A_3", "GPIO_A_4",
			  "GPIO_A_5", "GPIO_A_6", "GPIO_A_7", "DIO1_OUT",
			  "DIO2_OUT", "USB_A_OC#", "CAM_MCK", "USB_B_OC#",
			  "ETH_MDC", "ETH_MDIO", "ETH_A_(S)(R)(G)MII_TXD3",
			  "ETH_A_(S)(R)(G)MII_TXD2", "ETH_A_(S)(R)(G)MII_TXD1",
			  "ETH_A_(S)(R)(G)MII_TXD0", "ETH_A_(R)(G)MII_TX_EN(_ER)",
			  "ETH_A_(R)(G)MII_TX_CLK", "ETH_A_(R)(G)MII_RX_DV(_ER)",
			  "ETH_A_(R)(G)MII_RX_CLK", "ETH_A_(S)(R)(G)MII_RXD0",
			  "ETH_A_(S)(R)(G)MII_RXD1", "ETH_A_(R)(G)MII_RXD2",
			  "ETH_A_(R)(G)MII_RXD3";
};

/*
 * Rename SoM signals according to board usage:
 *   GPIO_B_2      -> DIO3_OUT
 *   GPIO_B_3      -> DIO4_OUT
 */
&gpio3 {
	gpio-line-names = "GPIO_C_5", "GPIO_C_4", "SDIO_B_CD#", "SDIO_B_D5",
			  "SDIO_B_D6", "SDIO_B_D7", "GPIO_C_0", "GPIO_C_1",
			  "GPIO_C_2", "GPIO_C_3", "SDIO_B_D0", "SDIO_B_D1",
			  "SDIO_B_D2", "SDIO_B_D3", "", "SDIO_B_D4",
			  "CARRIER_PWR_EN", "SDIO_B_CLK", "SDIO_B_CMD", "DIO3_OUT",
			  "USB_B_EN", "DIO4_OUT", "PCIe_CLKREQ#", "PCIe_A_PERST#",
			  "PCIe_WAKE#", "USB_A_EN";
};

/*
 * Rename SoM signals according to board usage:
 *   GPIO_B_4      -> DIO1_IN
 *   GPIO_B_5      -> DIO2_IN
 *   GPIO_B_6      -> DIO3_IN
 *   GPIO_B_7      -> DIO4_IN
 */
&gpio4 {
	gpio-line-names = "GPIO_C_7", "", "I2S_A_DATA_IN", "I2S_B_DATA_IN",
			  "DIO1_IN", "BOOT_SEL0#", "BOOT_SEL1#", "",
			  "", "", "I2S_LRCLK", "I2S_BITCLK",
			  "I2S_A_DATA_OUT", "I2S_B_DATA_OUT", "DIO2_IN", "DIO3_IN",
			  "DIO4_IN", "SPI_A_/WP_(IO2)", "SPI_A_/HOLD_(IO3)", "GPIO_C_6",
			  "I2S_MCLK", "UART_A_TX", "UART_A_RX", "UART_A_CTS",
			  "UART_A_RTS", "", "", "",
			  "PCIe_SM_ALERT", "UART_B_RTS", "UART_B_CTS", "UART_B_RX";
};

&i2c3 {
	status = "okay";

	usb-hub@2c {
		compatible = "microchip,usb2514b";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usb_hub>;
		reg = <0x2c>;
		non-removable-ports = <0>, <3>;
		reset-gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
	};
};

&pwm2 {
	status = "okay";
};

&reg_usb2_vbus {
	status = "disabled";
};

&reg_usdhc2_vcc {
	status = "disabled";
};

&reg_usdhc3_vcc {
	status = "disabled";
};

&uart1 {
	uart-has-rtscts;
	status = "okay";
};

&uart2 {
	linux,rs485-enabled-at-boot-time;
	uart-has-rtscts;
	status = "okay";
};

&usbotg1 {
	dr_mode = "otg";
	status = "okay";
};

&usbotg2 {
	dr_mode = "host";
	disable-over-current;
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	/* VBUS is controlled by the hub */
	/delete-property/ vbus-supply;

	usb1@1 {
		compatible = "usb424,2514";
		reg = <1>;
		#address-cells = <1>;
		#size-cells = <0>;

		usbnet: ethernet@1 {
			compatible = "usbb95,772b";
			reg = <1>;
			local-mac-address = [ 00 00 00 00 00 00 ];
		};
	};
};

&usdhc2 {
	vmmc-supply = <&reg_vdd_3v3>;
	status = "okay";
};

&iomuxc {
	pinctrl_can: cangrp {
		fsl,pins = <
			MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1			0x19  /* SDIO_B_PWR_EN */
		>;
	};

	pinctrl_usb_hub: usbhubgrp {
		fsl,pins = <
			MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2		0x19 /* SDIO_B_WP */
		>;
	};
};
