- There are three PHY lanes on iMX8QM, and can be
  used in the following three cases
    1. a two lanes PCIE_A, and a single lane SATA.
    2. a single lane PCIE_A, a single lane PCIE_B
    and a single lane SATA.
    3. a two lanes PCIE_A, and a single lane PCIE_B.
  The configuration of the iMX8QM AHCI SATA is relied
  on the usage of PCIE ports in the case 1 and 2.
  Use standalone iMX8 AHCI SATA probe and enable
  functions to enable iMX8QM AHCI SATA support.
- To save power consumption, PHY CLKs can be gated
  off after the configurations are done.
- The impedance ratio should be configured refer to
  differnet REXT values.
  0x6c <--> REXT value is 85Ohms
  0x80 (default value) <--> REXT value is 100Ohms.
  In general, REXT value should be 85ohms in standalone
  PCIE HW board design, and 100ohms in SATA standalone
  HW board design.
  When the PCIE and the SATA are enabled simultaneously
  in the HW board design. The REXT value would be set
  to 85ohms.
  Configure the SATA PHY impedance ratio to 0x6c in
  default.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>