• Sean Christopherson's avatar
    KVM: x86/mmu: Allow non-zero value for non-present SPTE and removed SPTE · 7f01cab8
    Sean Christopherson authored
    For TD guest, the current way to emulate MMIO doesn't work any more, as KVM
    is not able to access the private memory of TD guest and do the emulation.
    Instead, TD guest expects to receive #VE when it accesses the MMIO and then
    it can explicitly make hypercall to KVM to get the expected information.
    
    To achieve this, the TDX module always enables "EPT-violation #VE" in the
    VMCS control.  And accordingly, for the MMIO spte for the shared GPA,
    1. KVM needs to set "suppress #VE" bit for the non-present SPTE so that EPT
    violation happens on TD accessing MMIO range.  2. On EPT violation, KVM
    sets the MMIO spte to clear "suppress #VE" bit so the TD guest can receive
    the #VE instead of EPT misconfiguration unlike VMX case.  For the shared GPA
    that is not populated yet, EPT violation need to be triggered when TD guest
    accesses such shared GPA.  The non-present SPTE value for shared GPA should
    set "suppress #VE" bit.
    
    Add "suppress #VE" bit (bit 63) to SHADOW_NONPRESENT_VALUE and
    REMOVED_SPTE.  Unconditionally set the "suppress #VE" bit (which is bit 63)
    for both AMD and Intel as: 1) AMD hardware doesn't use this bit when
    present bit is off; 2) for normal VMX guest, KVM never enables the
    "EPT-violation #VE" in VMCS control and "suppress #VE" bit is ignored by
    hardware.
    Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
    Signed-off-by: default avatarIsaku Yamahata <isaku.yamahata@intel.com>
    Reviewed-by: default avatarBinbin Wu <binbin.wu@linux.intel.com>
    Reviewed-by: default avatarXiaoyao Li <xiaoyao.li@intel.com>
    Message-Id: <a99cb866897c7083430dce7f24c63b17d7121134.1705965635.git.isaku.yamahata@intel.com>
    Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
    7f01cab8
paging_tmpl.h 28.3 KB