Some processors may not have the RIXI bit advertised in the Config3 register,
not being a MIPS32R2 or R6 core, yet, they might be supporting it through a
different way, which is overriden during vendor-specific cpu_probe().

Move the RIXI exceptions enabling after the vendor-specific cpu_probe()
function has had a change to run and override the current CPU's options with
MIPS_CPU_RIXI.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: john@phrozen.org
Cc: cernekee@gmail.com
Cc: jon.fraser@broadcom.com
Cc: pgynther@google.com
Cc: paul.burton@imgtec.com
Cc: ddaney.cavm@gmail.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12506/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>