• Vineet Gupta's avatar
    ARC: entry: use gp to cache task pointer (vs. r25) · cfca4b5a
    Vineet Gupta authored
    The motivation is eventual ABI considerations for ARCv3 but even without
    it this change us worthwhile as diffstat reduces 100 net lines
    
    r25 is a callee saved register, normally not saved by entry code in
    pt_regs. However because of its usage in CONFIG_ARC_CURR_IN_REG it needs
    to be. This in turn requires a whole bunch of special casing when we
    need to access r25. Then there is distinction between user mode r25 vs.
    kernel mode r25 - hence distinct SAVE_CALLEE_SAVED_{USER,KERNEL}
    
    Instead use gp which is a scratch register and thus saved already in entry
    code. This cleans things up significantly and much nocer on eyes:
    
     - SAVE_CALLEE_SAVED_{USER,KERNEL} are now exactly same
     - no special user_r25 slot in pt_reggs
    
    Note that typical global asm registers are callee-saved (r25), but gp is
    not callee-saved thus needs additional -ffixed-<reg> toggle
    Signed-off-by: default avatarVineet Gupta <vgupta@kernel.org>
    cfca4b5a
current.h 548 Bytes