At the moment, MIC BIAS Internal* and MIC BIAS External* both reference
the same register, and have a part of their initialization sequence
duplicated.

For example, the sequence for enabling MIC BIAS Internal1 is:
  I1. Enable MIC_BIAS1 supply (MICB_EN bit in CDC_A_MICB_1_EN)
  I2. Enable internal RBIAS (TX1_INT_RBIAS_EN bit in CDC_A_MICB_1_INT_RBIAS)

The sequence for enabling MIC BIAS External1 is:
  E1. Enable MIC_BIAS1 supply (MICB_EN bit in CDC_A_MICB_1_EN)
  (E2. Ideally, make sure internal RBIAS is disabled. However, this should
   not happen in practice because DAPM will disable unused supplies...)

Right now we have:
  SND_SOC_DAPM_SUPPLY("MIC BIAS Internal1", CDC_A_MICB_1_EN, 7, 0, ...) // I1
  SND_SOC_DAPM_SUPPLY("MIC BIAS External1", CDC_A_MICB_1_EN, 7, 0, ...) // E1
and I2 is done in the PM event handler (pm8916_wcd_analog_enable_micbias_int1).

We can simplify this by defining a common DAPM supply for I1/E1 ("MIC_BIAS1"),
and one DAPM supply for I2 ("MIC BIAS Internal1"). Additional DAPM routes
ensure that we also enable the MIC_BIAS1 supply for the internal and external
pull up resistor.

Another advantage of this is that we now disable the internal RBIAS
when it is not needed. This makes it much easier to add support for
MIC BIAS Internal3 as a next step.

Tested-by: Nikita Travkin <nikitos.tr@gmail.com> # longcheer-l8150
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20200114181229.42302-1-stephan@gerhold.netSigned-off-by: Mark Brown <broonie@kernel.org>