• Philipp Puschmann's avatar
    serial: imx: adapt rx buffer and dma periods · 76c38d30
    Philipp Puschmann authored
    Using only 4 DMA periods for UART RX is very few if we have a high
    frequency of small transfers - like in our case using Bluetooth with
    many small packets via UART - causing many dma transfers but in each
    only filling a fraction of a single buffer. Such a case may lead to
    the situation that DMA RX transfer is triggered but no free buffer is
    available. When this happens dma channel ist stopped - with the patch
    "dmaengine: imx-sdma: fix dma freezes" temporarily only - with the
    possible consequences that:
    with disabled hw flow control:
      If enough data is incoming on UART port the RX FIFO runs over and
      characters will be lost. What then happens depends on upper layer.
    
    with enabled hw flow control:
      If enough data is incoming on UART port the RX FIFO reaches a level
      where CTS is deasserted and remote device sending the data stops.
      If it fails to stop timely the i.MX' RX FIFO may run over and data
      get lost. Otherwise it's internal TX buffer may getting filled to
      a point where it runs over and data is again lost. It depends on
      the remote device how this case is handled and if it is recoverable.
    
    Obviously we want to avoid having no free buffers available. So we
    decrease the size of the buffers and increase their number and the
    total buffer size.
    Signed-off-by: default avatarPhilipp Puschmann <philipp.puschmann@emlix.com>
    Reviewed-by: default avatarLucas Stach <l.stach@pengutronix.de>
    Link: https://lore.kernel.org/r/20190923135916.1212-1-philipp.puschmann@emlix.comSigned-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
    76c38d30
imx.c 67.3 KB