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Dong Aisheng authored
The Rapid General-Purpose Input and Output with 2 Ports (RGPIO2P) on MX7ULP is similar to GPIO on Vibrid, except it has an extra Port Data Direction Register (PDDR) used to configure the individual port pins for input or output. Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Stefan Agner <stefan@agner.ch> Signed-off-by:
Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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