• Paul Kocialkowski's avatar
    drm: Add support for the LogiCVC display controller · efeeaefe
    Paul Kocialkowski authored
    Introduces a driver for the LogiCVC display controller, a programmable
    logic controller optimized for use in Xilinx Zynq-7000 SoCs and other
    Xilinx FPGAs. The controller is mostly configured at logic synthesis
    time so only a subset of configuration is left for the driver to
    handle.
    
    The following features are implemented and tested:
    - LVDS 4-bit interface;
    - RGB565 pixel formats;
    - Multiple layers and hardware composition;
    - Layer-wide alpha mode;
    
    The following features are implemented but untested:
    - Other RGB pixel formats;
    - Layer framebuffer configuration for version 4;
    - Lowest-layer used as background color;
    - Per-pixel alpha mode.
    
    The following features are not implemented:
    - YUV pixel formats;
    - DVI, LVDS 3-bit, ITU656 and camera link interfaces;
    - External parallel input for layer;
    - Color-keying;
    - LUT-based alpha modes.
    
    Additional implementation-specific notes:
    - Panels are only enabled after the first page flip to avoid flashing a
      white screen.
    - Depth used in context of the LogiCVC driver only counts color components
      to match the definition of the synthesis parameters.
    
    Support is implemented for both version 3 and 4 of the controller.
    
    With version 3, framebuffers are stored in a dedicated contiguous
    memory area, with a base address hardcoded for each layer. This requires
    using a dedicated CMA pool registered at the base address and tweaking a
    few offset-related registers to try to use any buffer allocated from
    the pool. This is done on a best-effort basis to have the hardware cope
    with the DRM framebuffer allocation model and there is no guarantee
    that each buffer allocated by GEM CMA can be used for any layer.
    In particular, buffers allocated below the base address for a layer are
    guaranteed not to be configurable for that layer. See the implementation of
    logicvc_layer_buffer_find_setup for specifics.
    
    Version 4 allows configuring each buffer address directly, which
    guarantees that any buffer can be configured.
    Signed-off-by: default avatarPaul Kocialkowski <paul.kocialkowski@bootlin.com>
    Reviewed-by: default avatarMaxime Ripard <mripard@kernel.org>
    Link: https://patchwork.freedesktop.org/patch/msgid/20220520141555.1429041-2-paul.kocialkowski@bootlin.com
    efeeaefe
Makefile 172 Bytes