Commit 004be386 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov

drm/msm/dpu: call dpu_rm_get_intf() from dpu_encoder_get_intf()

There is little sense to get intf index just to call dpu_rm_get_intf()
on it. Move dpu_rm_get_intf() call to dpu_encoder_get_intf() function.
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280
Patchwork: https://patchwork.freedesktop.org/patch/540632/
Link: https://lore.kernel.org/r/20230601172236.564445-6-dmitry.baryshkov@linaro.orgSigned-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 04ada3d8
...@@ -1270,22 +1270,23 @@ static void dpu_encoder_virt_atomic_disable(struct drm_encoder *drm_enc, ...@@ -1270,22 +1270,23 @@ static void dpu_encoder_virt_atomic_disable(struct drm_encoder *drm_enc,
mutex_unlock(&dpu_enc->enc_lock); mutex_unlock(&dpu_enc->enc_lock);
} }
static enum dpu_intf dpu_encoder_get_intf(const struct dpu_mdss_cfg *catalog, static struct dpu_hw_intf *dpu_encoder_get_intf(const struct dpu_mdss_cfg *catalog,
struct dpu_rm *dpu_rm,
enum dpu_intf_type type, u32 controller_id) enum dpu_intf_type type, u32 controller_id)
{ {
int i = 0; int i = 0;
if (type == INTF_WB) if (type == INTF_WB)
return INTF_MAX; return NULL;
for (i = 0; i < catalog->intf_count; i++) { for (i = 0; i < catalog->intf_count; i++) {
if (catalog->intf[i].type == type if (catalog->intf[i].type == type
&& catalog->intf[i].controller_id == controller_id) { && catalog->intf[i].controller_id == controller_id) {
return catalog->intf[i].id; return dpu_rm_get_intf(dpu_rm, catalog->intf[i].id);
} }
} }
return INTF_MAX; return NULL;
} }
void dpu_encoder_vblank_callback(struct drm_encoder *drm_enc, void dpu_encoder_vblank_callback(struct drm_encoder *drm_enc,
...@@ -2307,7 +2308,6 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc, ...@@ -2307,7 +2308,6 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc,
* h_tile_instance_ids[2] = {1, 0}; DSI1 = left, DSI0 = right * h_tile_instance_ids[2] = {1, 0}; DSI1 = left, DSI0 = right
*/ */
u32 controller_id = disp_info->h_tile_instance[i]; u32 controller_id = disp_info->h_tile_instance[i];
enum dpu_intf intf_idx;
if (disp_info->num_of_h_tiles > 1) { if (disp_info->num_of_h_tiles > 1) {
if (i == 0) if (i == 0)
...@@ -2321,12 +2321,9 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc, ...@@ -2321,12 +2321,9 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc,
DPU_DEBUG("h_tile_instance %d = %d, split_role %d\n", DPU_DEBUG("h_tile_instance %d = %d, split_role %d\n",
i, controller_id, phys_params.split_role); i, controller_id, phys_params.split_role);
intf_idx = dpu_encoder_get_intf(dpu_kms->catalog, phys_params.hw_intf = dpu_encoder_get_intf(dpu_kms->catalog, &dpu_kms->rm,
disp_info->intf_type, disp_info->intf_type,
controller_id); controller_id);
if (intf_idx >= INTF_0 && intf_idx < INTF_MAX)
phys_params.hw_intf = dpu_rm_get_intf(&dpu_kms->rm, intf_idx);
if (disp_info->intf_type == INTF_WB && controller_id < WB_MAX) if (disp_info->intf_type == INTF_WB && controller_id < WB_MAX)
phys_params.hw_wb = dpu_rm_get_wb(&dpu_kms->rm, controller_id); phys_params.hw_wb = dpu_rm_get_wb(&dpu_kms->rm, controller_id);
...@@ -2350,7 +2347,6 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc, ...@@ -2350,7 +2347,6 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc,
DPU_ERROR_ENC(dpu_enc, "failed to add phys encs\n"); DPU_ERROR_ENC(dpu_enc, "failed to add phys encs\n");
break; break;
} }
} }
mutex_unlock(&dpu_enc->enc_lock); mutex_unlock(&dpu_enc->enc_lock);
......
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