Commit 00da9ffa authored by Wen Xiong's avatar Wen Xiong Committed by Martin K. Petersen

ipr: Add new CCIN for new adapters support

Add the appropriate definitions and table entries for new adapters
support.
Signed-off-by: default avatarWen Xiong <wenxiong@linux.vnet.ibm.com>
Reviewed-by: default avatarGabriel Krisman Bertazi <krisman@linux.vnet.ibm.com>
Acked-by: default avatarBrian King <brking@linux.vnet.ibm.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 68350a88
...@@ -194,7 +194,8 @@ static const struct ipr_chip_t ipr_chip[] = { ...@@ -194,7 +194,8 @@ static const struct ipr_chip_t ipr_chip[] = {
{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] }, { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
{ PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] }, { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] }, { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] },
{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] } { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] },
{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_RATTLESNAKE, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] }
}; };
static int ipr_max_bus_speeds[] = { static int ipr_max_bus_speeds[] = {
...@@ -10565,6 +10566,10 @@ static struct pci_device_id ipr_pci_table[] = { ...@@ -10565,6 +10566,10 @@ static struct pci_device_id ipr_pci_table[] = {
PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CD2, 0, 0, 0 }, PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CD2, 0, 0, 0 },
{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE, { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CCD, 0, 0, 0 }, PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2CCD, 0, 0, 0 },
{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_RATTLESNAKE,
PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_580A, 0, 0, 0 },
{ PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_RATTLESNAKE,
PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_580B, 0, 0, 0 },
{ } { }
}; };
MODULE_DEVICE_TABLE(pci, ipr_pci_table); MODULE_DEVICE_TABLE(pci, ipr_pci_table);
......
...@@ -60,6 +60,7 @@ ...@@ -60,6 +60,7 @@
#define PCI_DEVICE_ID_IBM_CROC_FPGA_E2 0x033D #define PCI_DEVICE_ID_IBM_CROC_FPGA_E2 0x033D
#define PCI_DEVICE_ID_IBM_CROCODILE 0x034A #define PCI_DEVICE_ID_IBM_CROCODILE 0x034A
#define PCI_DEVICE_ID_IBM_RATTLESNAKE 0x04DA
#define IPR_SUBS_DEV_ID_2780 0x0264 #define IPR_SUBS_DEV_ID_2780 0x0264
#define IPR_SUBS_DEV_ID_5702 0x0266 #define IPR_SUBS_DEV_ID_5702 0x0266
...@@ -111,6 +112,8 @@ ...@@ -111,6 +112,8 @@
#define IPR_SUBS_DEV_ID_2CCA 0x04C7 #define IPR_SUBS_DEV_ID_2CCA 0x04C7
#define IPR_SUBS_DEV_ID_2CD2 0x04C8 #define IPR_SUBS_DEV_ID_2CD2 0x04C8
#define IPR_SUBS_DEV_ID_2CCD 0x04C9 #define IPR_SUBS_DEV_ID_2CCD 0x04C9
#define IPR_SUBS_DEV_ID_580A 0x04FC
#define IPR_SUBS_DEV_ID_580B 0x04FB
#define IPR_NAME "ipr" #define IPR_NAME "ipr"
/* /*
......
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