Commit 00e2bcd6 authored by Stephen Boyd's avatar Stephen Boyd Committed by Ingo Molnar

clocksource: Timer-sun5i: Switch to sched_clock_register()

The 32-bit sched_clock() interface supports 64 bits since
3.13-rc1. Upgrade to the 64-bit function to allow us to remove
the 32-bit registration interface.
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Acked-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1389922686-6249-1-git-send-email-sboyd@codeaurora.orgSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 1b3f8287
...@@ -136,7 +136,7 @@ static struct irqaction sun5i_timer_irq = { ...@@ -136,7 +136,7 @@ static struct irqaction sun5i_timer_irq = {
.dev_id = &sun5i_clockevent, .dev_id = &sun5i_clockevent,
}; };
static u32 sun5i_timer_sched_read(void) static u64 sun5i_timer_sched_read(void)
{ {
return ~readl(timer_base + TIMER_CNTVAL_LO_REG(1)); return ~readl(timer_base + TIMER_CNTVAL_LO_REG(1));
} }
...@@ -166,7 +166,7 @@ static void __init sun5i_timer_init(struct device_node *node) ...@@ -166,7 +166,7 @@ static void __init sun5i_timer_init(struct device_node *node)
writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD, writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD,
timer_base + TIMER_CTL_REG(1)); timer_base + TIMER_CTL_REG(1));
setup_sched_clock(sun5i_timer_sched_read, 32, rate); sched_clock_register(sun5i_timer_sched_read, 32, rate);
clocksource_mmio_init(timer_base + TIMER_CNTVAL_LO_REG(1), node->name, clocksource_mmio_init(timer_base + TIMER_CNTVAL_LO_REG(1), node->name,
rate, 340, 32, clocksource_mmio_readl_down); rate, 340, 32, clocksource_mmio_readl_down);
......
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