Commit 012bd7e8 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'riscv-for-linus-6.0-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Palmer Dabbelt:

 - A handful of fixes for the Microchip device trees

 - A pair of fixes to eliminate build warnings

* tag 'riscv-for-linus-6.0-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: dts: microchip: mpfs: remove pci axi address translation property
  riscv: dts: microchip: mpfs: remove bogus card-detect-delay
  riscv: dts: microchip: mpfs: remove ti,fifo-depth property
  riscv: dts: microchip: mpfs: fix incorrect pcie child node name
  riscv: traps: add missing prototype
  riscv: signal: fix missing prototype warning
  riscv: dts: microchip: correct L2 cache interrupts
parents c23f864d 1709c70c
...@@ -84,12 +84,10 @@ &mac1 { ...@@ -84,12 +84,10 @@ &mac1 {
phy1: ethernet-phy@9 { phy1: ethernet-phy@9 {
reg = <9>; reg = <9>;
ti,fifo-depth = <0x1>;
}; };
phy0: ethernet-phy@8 { phy0: ethernet-phy@8 {
reg = <8>; reg = <8>;
ti,fifo-depth = <0x1>;
}; };
}; };
...@@ -102,7 +100,6 @@ &mmc { ...@@ -102,7 +100,6 @@ &mmc {
disable-wp; disable-wp;
cap-sd-highspeed; cap-sd-highspeed;
cap-mmc-highspeed; cap-mmc-highspeed;
card-detect-delay = <200>;
mmc-ddr-1_8v; mmc-ddr-1_8v;
mmc-hs200-1_8v; mmc-hs200-1_8v;
sd-uhs-sdr12; sd-uhs-sdr12;
......
...@@ -54,12 +54,10 @@ &mac1 { ...@@ -54,12 +54,10 @@ &mac1 {
phy1: ethernet-phy@5 { phy1: ethernet-phy@5 {
reg = <5>; reg = <5>;
ti,fifo-depth = <0x01>;
}; };
phy0: ethernet-phy@4 { phy0: ethernet-phy@4 {
reg = <4>; reg = <4>;
ti,fifo-depth = <0x01>;
}; };
}; };
...@@ -72,7 +70,6 @@ &mmc { ...@@ -72,7 +70,6 @@ &mmc {
disable-wp; disable-wp;
cap-sd-highspeed; cap-sd-highspeed;
cap-mmc-highspeed; cap-mmc-highspeed;
card-detect-delay = <200>;
mmc-ddr-1_8v; mmc-ddr-1_8v;
mmc-hs200-1_8v; mmc-hs200-1_8v;
sd-uhs-sdr12; sd-uhs-sdr12;
......
...@@ -193,7 +193,7 @@ cctrllr: cache-controller@2010000 { ...@@ -193,7 +193,7 @@ cctrllr: cache-controller@2010000 {
cache-size = <2097152>; cache-size = <2097152>;
cache-unified; cache-unified;
interrupt-parent = <&plic>; interrupt-parent = <&plic>;
interrupts = <1>, <2>, <3>; interrupts = <1>, <3>, <4>, <2>;
}; };
clint: clint@2000000 { clint: clint@2000000 {
...@@ -485,9 +485,8 @@ pcie: pcie@2000000000 { ...@@ -485,9 +485,8 @@ pcie: pcie@2000000000 {
ranges = <0x3000000 0x0 0x8000000 0x20 0x8000000 0x0 0x80000000>; ranges = <0x3000000 0x0 0x8000000 0x20 0x8000000 0x0 0x80000000>;
msi-parent = <&pcie>; msi-parent = <&pcie>;
msi-controller; msi-controller;
microchip,axi-m-atr0 = <0x10 0x0>;
status = "disabled"; status = "disabled";
pcie_intc: legacy-interrupt-controller { pcie_intc: interrupt-controller {
#address-cells = <0>; #address-cells = <0>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
interrupt-controller; interrupt-controller;
......
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __ASM_SIGNAL_H
#define __ASM_SIGNAL_H
#include <uapi/asm/signal.h>
#include <uapi/asm/ptrace.h>
asmlinkage __visible
void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags);
#endif
...@@ -42,6 +42,8 @@ ...@@ -42,6 +42,8 @@
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
extern long shadow_stack[SHADOW_OVERFLOW_STACK_SIZE / sizeof(long)];
#include <asm/processor.h> #include <asm/processor.h>
#include <asm/csr.h> #include <asm/csr.h>
......
...@@ -15,6 +15,7 @@ ...@@ -15,6 +15,7 @@
#include <asm/ucontext.h> #include <asm/ucontext.h>
#include <asm/vdso.h> #include <asm/vdso.h>
#include <asm/signal.h>
#include <asm/signal32.h> #include <asm/signal32.h>
#include <asm/switch_to.h> #include <asm/switch_to.h>
#include <asm/csr.h> #include <asm/csr.h>
......
...@@ -20,9 +20,10 @@ ...@@ -20,9 +20,10 @@
#include <asm/asm-prototypes.h> #include <asm/asm-prototypes.h>
#include <asm/bug.h> #include <asm/bug.h>
#include <asm/csr.h>
#include <asm/processor.h> #include <asm/processor.h>
#include <asm/ptrace.h> #include <asm/ptrace.h>
#include <asm/csr.h> #include <asm/thread_info.h>
int show_unhandled_signals = 1; int show_unhandled_signals = 1;
......
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