Commit 01d0c436 authored by Bjorn Helgaas's avatar Bjorn Helgaas Committed by Russell King

[SERIAL] remove unused RS_TABLE definitions

Patch from Bjorn Helgaas.

RS_TABLE is defined by lots of architectures, but only referenced
in arch/{mips,ppc}.

This patch removes most of the unused definitions from 2.6.
parent ee0bb666
...@@ -26,9 +26,6 @@ ...@@ -26,9 +26,6 @@
#define FOURPORT_FLAGS ASYNC_FOURPORT #define FOURPORT_FLAGS ASYNC_FOURPORT
#define ACCENT_FLAGS 0 #define ACCENT_FLAGS 0
#define BOCA_FLAGS 0 #define BOCA_FLAGS 0
#define RS_TABLE_SIZE 64
#else
#define RS_TABLE_SIZE 4
#endif #endif
#define STD_SERIAL_PORT_DEFNS \ #define STD_SERIAL_PORT_DEFNS \
......
...@@ -21,8 +21,6 @@ ...@@ -21,8 +21,6 @@
#ifdef CONFIG_ARCH_ADI_EVB #ifdef CONFIG_ARCH_ADI_EVB
#define RS_TABLE_SIZE 1
/* /*
* One serial port, int goes to FIQ, so we run in polled mode * One serial port, int goes to FIQ, so we run in polled mode
*/ */
......
...@@ -20,7 +20,6 @@ ...@@ -20,7 +20,6 @@
/* /*
* UART3 and UART4 are not supported yet * UART3 and UART4 are not supported yet
*/ */
#define RS_TABLE_SIZE 3
#define STD_SERIAL_PORT_DEFNS \ #define STD_SERIAL_PORT_DEFNS \
{ 0, 0, IO_BASE + UART0, IRQ_UART0, 0 }, \ { 0, 0, IO_BASE + UART0, IRQ_UART0, 0 }, \
{ 0, 0, IO_BASE + UART1, IRQ_UART1, 0 }, \ { 0, 0, IO_BASE + UART1, IRQ_UART1, 0 }, \
......
...@@ -22,8 +22,6 @@ ...@@ -22,8 +22,6 @@
*/ */
#define BASE_BAUD (1843200 / 16) #define BASE_BAUD (1843200 / 16)
#define RS_TABLE_SIZE 16
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
/* UART CLK PORT IRQ FLAGS */ /* UART CLK PORT IRQ FLAGS */
......
...@@ -24,8 +24,6 @@ ...@@ -24,8 +24,6 @@
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
#define RS_TABLE_SIZE 2
/* UART CLK PORT IRQ FLAGS */ /* UART CLK PORT IRQ FLAGS */
#define STD_SERIAL_PORT_DEFNS \ #define STD_SERIAL_PORT_DEFNS \
{ 0, BASE_BAUD, 0x3F8, 1, STD_COM_FLAGS }, /* ttyS0 */ \ { 0, BASE_BAUD, 0x3F8, 1, STD_COM_FLAGS }, /* ttyS0 */ \
......
...@@ -28,8 +28,6 @@ ...@@ -28,8 +28,6 @@
#define _SER_IRQ0 IRQ_ISA_UART #define _SER_IRQ0 IRQ_ISA_UART
#define _SER_IRQ1 IRQ_ISA_UART2 #define _SER_IRQ1 IRQ_ISA_UART2
#define RS_TABLE_SIZE 16
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
/* UART CLK PORT IRQ FLAGS */ /* UART CLK PORT IRQ FLAGS */
......
...@@ -36,8 +36,6 @@ ...@@ -36,8 +36,6 @@
#define _SER_IRQ0 IRQ_UARTINT0 #define _SER_IRQ0 IRQ_UARTINT0
#define _SER_IRQ1 IRQ_UARTINT1 #define _SER_IRQ1 IRQ_UARTINT1
#define RS_TABLE_SIZE 2
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
/* UART CLK PORT IRQ FLAGS */ /* UART CLK PORT IRQ FLAGS */
......
...@@ -35,8 +35,6 @@ ...@@ -35,8 +35,6 @@
#define _SER_IRQ0 IRQ_UARTINT0 #define _SER_IRQ0 IRQ_UARTINT0
#define _SER_IRQ1 IRQ_UARTINT1 #define _SER_IRQ1 IRQ_UARTINT1
#define RS_TABLE_SIZE 2
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
/* UART CLK PORT IRQ FLAGS */ /* UART CLK PORT IRQ FLAGS */
......
...@@ -20,8 +20,6 @@ ...@@ -20,8 +20,6 @@
#define IRQ_UART1 IRQ_IQ80310_UART1 #define IRQ_UART1 IRQ_IQ80310_UART1
#define IRQ_UART2 IRQ_IQ80310_UART2 #define IRQ_UART2 IRQ_IQ80310_UART2
#define RS_TABLE_SIZE 2
#define STD_SERIAL_PORT_DEFNS \ #define STD_SERIAL_PORT_DEFNS \
/* UART CLK PORT IRQ FLAGS */ \ /* UART CLK PORT IRQ FLAGS */ \
{ 0, BASE_BAUD, IQ80310_UART2, IRQ_UART2, STD_COM_FLAGS }, /* ttyS0 */ \ { 0, BASE_BAUD, IQ80310_UART2, IRQ_UART2, STD_COM_FLAGS }, /* ttyS0 */ \
...@@ -33,8 +31,6 @@ ...@@ -33,8 +31,6 @@
#define IRQ_UART1 IRQ_IQ80321_UART #define IRQ_UART1 IRQ_IQ80321_UART
#define RS_TABLE_SIZE 1
#define STD_SERIAL_PORT_DEFNS \ #define STD_SERIAL_PORT_DEFNS \
/* UART CLK PORT IRQ FLAGS */ \ /* UART CLK PORT IRQ FLAGS */ \
{ 0, BASE_BAUD, 0xfe800000, IRQ_UART1, STD_COM_FLAGS }, /* ttyS0 */ { 0, BASE_BAUD, 0xfe800000, IRQ_UART1, STD_COM_FLAGS }, /* ttyS0 */
......
...@@ -27,8 +27,6 @@ ...@@ -27,8 +27,6 @@
*/ */
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
#define RS_TABLE_SIZE 2
#define STD_SERIAL_PORT_DEFNS \ #define STD_SERIAL_PORT_DEFNS \
/* MAGIC UART CLK PORT IRQ FLAGS */ \ /* MAGIC UART CLK PORT IRQ FLAGS */ \
{ 0, BASE_BAUD, UART1_BASE, IRQ_UART_1, STD_COM_FLAGS }, /* ttyLU0 */ \ { 0, BASE_BAUD, UART1_BASE, IRQ_UART_1, STD_COM_FLAGS }, /* ttyLU0 */ \
......
...@@ -15,8 +15,6 @@ ...@@ -15,8 +15,6 @@
/* Standard COM flags */ /* Standard COM flags */
#define STD_COM_FLAGS (ASYNC_SKIP_TEST) #define STD_COM_FLAGS (ASYNC_SKIP_TEST)
#define RS_TABLE_SIZE 5
#define STD_SERIAL_PORT_DEFNS \ #define STD_SERIAL_PORT_DEFNS \
{ \ { \
type: PORT_PXA, \ type: PORT_PXA, \
......
...@@ -24,8 +24,6 @@ ...@@ -24,8 +24,6 @@
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
#define RS_TABLE_SIZE 16
/* UART CLK PORT IRQ FLAGS */ /* UART CLK PORT IRQ FLAGS */
#define STD_SERIAL_PORT_DEFNS \ #define STD_SERIAL_PORT_DEFNS \
{ 0, BASE_BAUD, 0x3F8, 10, STD_COM_FLAGS }, /* ttyS0 */ \ { 0, BASE_BAUD, 0x3F8, 10, STD_COM_FLAGS }, /* ttyS0 */ \
......
...@@ -19,8 +19,6 @@ ...@@ -19,8 +19,6 @@
*/ */
#ifdef CONFIG_SA1100_TRIZEPS #ifdef CONFIG_SA1100_TRIZEPS
#define RS_TABLE_SIZE 2
#define STD_SERIAL_PORT_DEFNS \ #define STD_SERIAL_PORT_DEFNS \
/* UART CLK PORT IRQ FLAGS */ \ /* UART CLK PORT IRQ FLAGS */ \
{ 0, 1500000, TRIZEPS_UART5, IRQ_GPIO16, STD_COM_FLAGS }, \ { 0, 1500000, TRIZEPS_UART5, IRQ_GPIO16, STD_COM_FLAGS }, \
...@@ -28,8 +26,6 @@ ...@@ -28,8 +26,6 @@
#else #else
#define RS_TABLE_SIZE 4
/* /*
* This assumes you have a 1.8432 MHz clock for your UART. * This assumes you have a 1.8432 MHz clock for your UART.
* *
......
...@@ -20,8 +20,6 @@ ...@@ -20,8 +20,6 @@
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
#define RS_TABLE_SIZE 2
/* UART CLK PORT IRQ FLAGS */ /* UART CLK PORT IRQ FLAGS */
#define STD_SERIAL_PORT_DEFNS \ #define STD_SERIAL_PORT_DEFNS \
{ 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
......
...@@ -20,8 +20,6 @@ ...@@ -20,8 +20,6 @@
*/ */
#define BASE_BAUD (1843200 / 16) #define BASE_BAUD (1843200 / 16)
#define RS_TABLE_SIZE 2
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
/* UART CLK PORT IRQ FLAGS */ /* UART CLK PORT IRQ FLAGS */
......
...@@ -27,8 +27,6 @@ ...@@ -27,8 +27,6 @@
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
#define RS_TABLE_SIZE 16
#if defined(CONFIG_ARCH_A5K) #if defined(CONFIG_ARCH_A5K)
/* UART CLK PORT IRQ FLAGS */ /* UART CLK PORT IRQ FLAGS */
......
...@@ -27,9 +27,6 @@ ...@@ -27,9 +27,6 @@
#define ACCENT_FLAGS 0 #define ACCENT_FLAGS 0
#define BOCA_FLAGS 0 #define BOCA_FLAGS 0
#define HUB6_FLAGS 0 #define HUB6_FLAGS 0
#define RS_TABLE_SIZE 64
#else
#define RS_TABLE_SIZE
#endif #endif
#define MCA_COM_FLAGS (STD_COM_FLAGS|ASYNC_BOOT_ONLYMCA) #define MCA_COM_FLAGS (STD_COM_FLAGS|ASYNC_BOOT_ONLYMCA)
......
...@@ -30,9 +30,6 @@ ...@@ -30,9 +30,6 @@
#define FOURPORT_FLAGS ASYNC_FOURPORT #define FOURPORT_FLAGS ASYNC_FOURPORT
#define ACCENT_FLAGS 0 #define ACCENT_FLAGS 0
#define BOCA_FLAGS 0 #define BOCA_FLAGS 0
#define RS_TABLE_SIZE 64
#else
#define RS_TABLE_SIZE 4
#endif #endif
#define STD_SERIAL_PORT_DEFNS \ #define STD_SERIAL_PORT_DEFNS \
......
...@@ -11,9 +11,6 @@ ...@@ -11,9 +11,6 @@
#define BASE_BAUD (3379200 / 16) #define BASE_BAUD (3379200 / 16)
/* Leave 2 spare for possible PCMCIA serial cards */
#define RS_TABLE_SIZE 3
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
......
...@@ -4,8 +4,6 @@ ...@@ -4,8 +4,6 @@
* guess. */ * guess. */
#define BASE_BAUD (16800000 / 16) #define BASE_BAUD (16800000 / 16)
#define RS_TABLE_SIZE 3
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
/* there is a fourth serial port with the expected values as well, but /* there is a fourth serial port with the expected values as well, but
......
...@@ -11,9 +11,6 @@ ...@@ -11,9 +11,6 @@
#define BASE_BAUD (3379200 / 16) #define BASE_BAUD (3379200 / 16)
/* Leave 2 spare for possible PCMCIA serial cards */
#define RS_TABLE_SIZE 3
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
......
...@@ -4,8 +4,6 @@ ...@@ -4,8 +4,6 @@
* guess. */ * guess. */
#define BASE_BAUD (16800000 / 16) #define BASE_BAUD (16800000 / 16)
#define RS_TABLE_SIZE 3
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
/* there is a fourth serial port with the expected values as well, but /* there is a fourth serial port with the expected values as well, but
......
...@@ -29,16 +29,12 @@ ...@@ -29,16 +29,12 @@
#ifdef CONFIG_HD64465 #ifdef CONFIG_HD64465
#include <asm/hd64465.h> #include <asm/hd64465.h>
#define RS_TABLE_SIZE 1
#define STD_SERIAL_PORT_DEFNS \ #define STD_SERIAL_PORT_DEFNS \
/* UART CLK PORT IRQ FLAGS */ \ /* UART CLK PORT IRQ FLAGS */ \
{ 0, BASE_BAUD, 0x3F8, HD64465_IRQ_UART, STD_COM_FLAGS } /* ttyS0 */ { 0, BASE_BAUD, 0x3F8, HD64465_IRQ_UART, STD_COM_FLAGS } /* ttyS0 */
#else #else
#define RS_TABLE_SIZE 2
#define STD_SERIAL_PORT_DEFNS \ #define STD_SERIAL_PORT_DEFNS \
/* UART CLK PORT IRQ FLAGS */ \ /* UART CLK PORT IRQ FLAGS */ \
{ 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \ { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
......
...@@ -16,7 +16,6 @@ ...@@ -16,7 +16,6 @@
#define irq_cannonicalize(x) (x) #define irq_cannonicalize(x) (x)
#define BASE_BAUD 250000 /* (16MHz / (16 * 38400)) * 9600 */ #define BASE_BAUD 250000 /* (16MHz / (16 * 38400)) * 9600 */
#define RS_TABLE_SIZE 1
#define SERIAL_PORT_DFNS \ #define SERIAL_PORT_DFNS \
{ 0, BASE_BAUD, CB_UART_BASE, IRQ_CB_EXTSIO, STD_COM_FLAGS }, { 0, BASE_BAUD, CB_UART_BASE, IRQ_CB_EXTSIO, STD_COM_FLAGS },
......
...@@ -27,9 +27,6 @@ ...@@ -27,9 +27,6 @@
#define ACCENT_FLAGS 0 #define ACCENT_FLAGS 0
#define BOCA_FLAGS 0 #define BOCA_FLAGS 0
#define HUB6_FLAGS 0 #define HUB6_FLAGS 0
#define RS_TABLE_SIZE 64
#else
#define RS_TABLE_SIZE
#endif #endif
#define MCA_COM_FLAGS (STD_COM_FLAGS|ASYNC_BOOT_ONLYMCA) #define MCA_COM_FLAGS (STD_COM_FLAGS|ASYNC_BOOT_ONLYMCA)
......
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