Commit 02ce6e87 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt

Merge remote-tracking branch 'scott/master' into merge

Scott wrote:

<<
The corenet64 patch fixes a regression introduced in 3.13-rc1 (commit
ef1313de, "powerpc: Add VMX optimised xor
for RAID5").

The 8xx patch fixes a regression introduced in 3.12 (commit
beb2dc0a, "powerpc: Convert some
mftb/mftbu into mfspr").

The other two patches are fixes for minor, long standing bugs.
>>
parents 6ce4eac1 d742aa15
...@@ -128,7 +128,12 @@ CFLAGS-$(CONFIG_POWER5_CPU) += $(call cc-option,-mcpu=power5) ...@@ -128,7 +128,12 @@ CFLAGS-$(CONFIG_POWER5_CPU) += $(call cc-option,-mcpu=power5)
CFLAGS-$(CONFIG_POWER6_CPU) += $(call cc-option,-mcpu=power6) CFLAGS-$(CONFIG_POWER6_CPU) += $(call cc-option,-mcpu=power6)
CFLAGS-$(CONFIG_POWER7_CPU) += $(call cc-option,-mcpu=power7) CFLAGS-$(CONFIG_POWER7_CPU) += $(call cc-option,-mcpu=power7)
# Altivec option not allowed with e500mc64 in GCC.
ifeq ($(CONFIG_ALTIVEC),y)
E5500_CPU := -mcpu=powerpc64
else
E5500_CPU := $(call cc-option,-mcpu=e500mc64,-mcpu=powerpc64) E5500_CPU := $(call cc-option,-mcpu=e500mc64,-mcpu=powerpc64)
endif
CFLAGS-$(CONFIG_E5500_CPU) += $(E5500_CPU) CFLAGS-$(CONFIG_E5500_CPU) += $(E5500_CPU)
CFLAGS-$(CONFIG_E6500_CPU) += $(call cc-option,-mcpu=e6500,$(E5500_CPU)) CFLAGS-$(CONFIG_E6500_CPU) += $(call cc-option,-mcpu=e6500,$(E5500_CPU))
......
...@@ -637,14 +637,14 @@ pme@10000 { ...@@ -637,14 +637,14 @@ pme@10000 {
tlu@2f000 { tlu@2f000 {
compatible = "fsl,mpc8572-tlu", "fsl_tlu"; compatible = "fsl,mpc8572-tlu", "fsl_tlu";
reg = <0x2f000 0x1000>; reg = <0x2f000 0x1000>;
interupts = <61 2 >; interrupts = <61 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
tlu@15000 { tlu@15000 {
compatible = "fsl,mpc8572-tlu", "fsl_tlu"; compatible = "fsl,mpc8572-tlu", "fsl_tlu";
reg = <0x15000 0x1000>; reg = <0x15000 0x1000>;
interupts = <75 2>; interrupts = <75 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
}; };
......
...@@ -547,14 +547,14 @@ pme@10000 { ...@@ -547,14 +547,14 @@ pme@10000 {
tlu@2f000 { tlu@2f000 {
compatible = "fsl,mpc8572-tlu", "fsl_tlu"; compatible = "fsl,mpc8572-tlu", "fsl_tlu";
reg = <0x2f000 0x1000>; reg = <0x2f000 0x1000>;
interupts = <61 2 >; interrupts = <61 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
tlu@15000 { tlu@15000 {
compatible = "fsl,mpc8572-tlu", "fsl_tlu"; compatible = "fsl,mpc8572-tlu", "fsl_tlu";
reg = <0x15000 0x1000>; reg = <0x15000 0x1000>;
interupts = <75 2>; interrupts = <75 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
}; };
......
...@@ -583,14 +583,14 @@ pme@10000 { ...@@ -583,14 +583,14 @@ pme@10000 {
tlu@2f000 { tlu@2f000 {
compatible = "fsl,mpc8572-tlu", "fsl_tlu"; compatible = "fsl,mpc8572-tlu", "fsl_tlu";
reg = <0x2f000 0x1000>; reg = <0x2f000 0x1000>;
interupts = <61 2 >; interrupts = <61 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
tlu@15000 { tlu@15000 {
compatible = "fsl,mpc8572-tlu", "fsl_tlu"; compatible = "fsl,mpc8572-tlu", "fsl_tlu";
reg = <0x15000 0x1000>; reg = <0x15000 0x1000>;
interupts = <75 2>; interrupts = <75 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
}; };
......
...@@ -545,14 +545,14 @@ pme@10000 { ...@@ -545,14 +545,14 @@ pme@10000 {
tlu@2f000 { tlu@2f000 {
compatible = "fsl,mpc8572-tlu", "fsl_tlu"; compatible = "fsl,mpc8572-tlu", "fsl_tlu";
reg = <0x2f000 0x1000>; reg = <0x2f000 0x1000>;
interupts = <61 2 >; interrupts = <61 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
tlu@15000 { tlu@15000 {
compatible = "fsl,mpc8572-tlu", "fsl_tlu"; compatible = "fsl,mpc8572-tlu", "fsl_tlu";
reg = <0x15000 0x1000>; reg = <0x15000 0x1000>;
interupts = <75 2>; interrupts = <75 2>;
interrupt-parent = <&mpic>; interrupt-parent = <&mpic>;
}; };
}; };
......
...@@ -71,18 +71,32 @@ udelay: ...@@ -71,18 +71,32 @@ udelay:
add r4,r4,r5 add r4,r4,r5
addi r4,r4,-1 addi r4,r4,-1
divw r4,r4,r5 /* BUS ticks */ divw r4,r4,r5 /* BUS ticks */
#ifdef CONFIG_8xx
1: mftbu r5
mftb r6
mftbu r7
#else
1: mfspr r5, SPRN_TBRU 1: mfspr r5, SPRN_TBRU
mfspr r6, SPRN_TBRL mfspr r6, SPRN_TBRL
mfspr r7, SPRN_TBRU mfspr r7, SPRN_TBRU
#endif
cmpw 0,r5,r7 cmpw 0,r5,r7
bne 1b /* Get [synced] base time */ bne 1b /* Get [synced] base time */
addc r9,r6,r4 /* Compute end time */ addc r9,r6,r4 /* Compute end time */
addze r8,r5 addze r8,r5
#ifdef CONFIG_8xx
2: mftbu r5
#else
2: mfspr r5, SPRN_TBRU 2: mfspr r5, SPRN_TBRU
#endif
cmpw 0,r5,r8 cmpw 0,r5,r8
blt 2b blt 2b
bgt 3f bgt 3f
#ifdef CONFIG_8xx
mftb r6
#else
mfspr r6, SPRN_TBRL mfspr r6, SPRN_TBRL
#endif
cmpw 0,r6,r9 cmpw 0,r6,r9
blt 2b blt 2b
3: blr 3: blr
...@@ -366,6 +366,8 @@ BEGIN_FTR_SECTION_NESTED(96); \ ...@@ -366,6 +366,8 @@ BEGIN_FTR_SECTION_NESTED(96); \
cmpwi dest,0; \ cmpwi dest,0; \
beq- 90b; \ beq- 90b; \
END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96) END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96)
#elif defined(CONFIG_8xx)
#define MFTB(dest) mftb dest
#else #else
#define MFTB(dest) mfspr dest, SPRN_TBRL #define MFTB(dest) mfspr dest, SPRN_TBRL
#endif #endif
......
...@@ -1174,12 +1174,19 @@ ...@@ -1174,12 +1174,19 @@
#else /* __powerpc64__ */ #else /* __powerpc64__ */
#if defined(CONFIG_8xx)
#define mftbl() ({unsigned long rval; \
asm volatile("mftbl %0" : "=r" (rval)); rval;})
#define mftbu() ({unsigned long rval; \
asm volatile("mftbu %0" : "=r" (rval)); rval;})
#else
#define mftbl() ({unsigned long rval; \ #define mftbl() ({unsigned long rval; \
asm volatile("mfspr %0, %1" : "=r" (rval) : \ asm volatile("mfspr %0, %1" : "=r" (rval) : \
"i" (SPRN_TBRL)); rval;}) "i" (SPRN_TBRL)); rval;})
#define mftbu() ({unsigned long rval; \ #define mftbu() ({unsigned long rval; \
asm volatile("mfspr %0, %1" : "=r" (rval) : \ asm volatile("mfspr %0, %1" : "=r" (rval) : \
"i" (SPRN_TBRU)); rval;}) "i" (SPRN_TBRU)); rval;})
#endif
#endif /* !__powerpc64__ */ #endif /* !__powerpc64__ */
#define mttbl(v) asm volatile("mttbl %0":: "r"(v)) #define mttbl(v) asm volatile("mttbl %0":: "r"(v))
......
...@@ -29,7 +29,11 @@ static inline cycles_t get_cycles(void) ...@@ -29,7 +29,11 @@ static inline cycles_t get_cycles(void)
ret = 0; ret = 0;
__asm__ __volatile__( __asm__ __volatile__(
#ifdef CONFIG_8xx
"97: mftb %0\n"
#else
"97: mfspr %0, %2\n" "97: mfspr %0, %2\n"
#endif
"99:\n" "99:\n"
".section __ftr_fixup,\"a\"\n" ".section __ftr_fixup,\"a\"\n"
".align 2\n" ".align 2\n"
...@@ -41,7 +45,11 @@ static inline cycles_t get_cycles(void) ...@@ -41,7 +45,11 @@ static inline cycles_t get_cycles(void)
" .long 0\n" " .long 0\n"
" .long 0\n" " .long 0\n"
".previous" ".previous"
#ifdef CONFIG_8xx
: "=r" (ret) : "i" (CPU_FTR_601));
#else
: "=r" (ret) : "i" (CPU_FTR_601), "i" (SPRN_TBRL)); : "=r" (ret) : "i" (CPU_FTR_601), "i" (SPRN_TBRL));
#endif
return ret; return ret;
#endif #endif
} }
......
...@@ -232,9 +232,15 @@ __do_get_tspec: ...@@ -232,9 +232,15 @@ __do_get_tspec:
lwz r6,(CFG_TB_ORIG_STAMP+4)(r9) lwz r6,(CFG_TB_ORIG_STAMP+4)(r9)
/* Get a stable TB value */ /* Get a stable TB value */
#ifdef CONFIG_8xx
2: mftbu r3
mftbl r4
mftbu r0
#else
2: mfspr r3, SPRN_TBRU 2: mfspr r3, SPRN_TBRU
mfspr r4, SPRN_TBRL mfspr r4, SPRN_TBRL
mfspr r0, SPRN_TBRU mfspr r0, SPRN_TBRU
#endif
cmplw cr0,r3,r0 cmplw cr0,r3,r0
bne- 2b bne- 2b
......
...@@ -117,6 +117,5 @@ void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr) ...@@ -117,6 +117,5 @@ void flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
struct hstate *hstate = hstate_file(vma->vm_file); struct hstate *hstate = hstate_file(vma->vm_file);
unsigned long tsize = huge_page_shift(hstate) - 10; unsigned long tsize = huge_page_shift(hstate) - 10;
__flush_tlb_page(vma ? vma->vm_mm : NULL, vmaddr, tsize, 0); __flush_tlb_page(vma->vm_mm, vmaddr, tsize, 0);
} }
...@@ -305,7 +305,7 @@ void __flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr, ...@@ -305,7 +305,7 @@ void __flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr) void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
{ {
#ifdef CONFIG_HUGETLB_PAGE #ifdef CONFIG_HUGETLB_PAGE
if (is_vm_hugetlb_page(vma)) if (vma && is_vm_hugetlb_page(vma))
flush_hugetlb_page(vma, vmaddr); flush_hugetlb_page(vma, vmaddr);
#endif #endif
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment