Commit 041bf022 authored by Dan Carpenter's avatar Dan Carpenter Committed by Alex Deucher

drm/amdgpu: missing bounds check in amdgpu_set_pp_force_state()

There is no limit on high "idx" can go.  It should be less than
ARRAY_SIZE(data.states) which is 16.

The "data" variable wasn't declared in that scope so I shifted the code
around a bit to make it work.  Also I made "idx" unsigned.

Fixes: f3898ea1 ('drm/amd/powerplay: add some sysfs interfaces for powerplay.')
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0ab15bde
...@@ -270,30 +270,28 @@ static ssize_t amdgpu_set_pp_force_state(struct device *dev, ...@@ -270,30 +270,28 @@ static ssize_t amdgpu_set_pp_force_state(struct device *dev,
struct drm_device *ddev = dev_get_drvdata(dev); struct drm_device *ddev = dev_get_drvdata(dev);
struct amdgpu_device *adev = ddev->dev_private; struct amdgpu_device *adev = ddev->dev_private;
enum amd_pm_state_type state = 0; enum amd_pm_state_type state = 0;
long idx; unsigned long idx;
int ret; int ret;
if (strlen(buf) == 1) if (strlen(buf) == 1)
adev->pp_force_state_enabled = false; adev->pp_force_state_enabled = false;
else { else if (adev->pp_enabled) {
ret = kstrtol(buf, 0, &idx); struct pp_states_info data;
if (ret) { ret = kstrtoul(buf, 0, &idx);
if (ret || idx >= ARRAY_SIZE(data.states)) {
count = -EINVAL; count = -EINVAL;
goto fail; goto fail;
} }
if (adev->pp_enabled) { amdgpu_dpm_get_pp_num_states(adev, &data);
struct pp_states_info data; state = data.states[idx];
amdgpu_dpm_get_pp_num_states(adev, &data); /* only set user selected power states */
state = data.states[idx]; if (state != POWER_STATE_TYPE_INTERNAL_BOOT &&
/* only set user selected power states */ state != POWER_STATE_TYPE_DEFAULT) {
if (state != POWER_STATE_TYPE_INTERNAL_BOOT && amdgpu_dpm_dispatch_task(adev,
state != POWER_STATE_TYPE_DEFAULT) { AMD_PP_EVENT_ENABLE_USER_STATE, &state, NULL);
amdgpu_dpm_dispatch_task(adev, adev->pp_force_state_enabled = true;
AMD_PP_EVENT_ENABLE_USER_STATE, &state, NULL);
adev->pp_force_state_enabled = true;
}
} }
} }
fail: fail:
......
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