Commit 043f275d authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'for-linus/2635-updates' of git://git.fluff.org/bjdooks/linux

* 'for-linus/2635-updates' of git://git.fluff.org/bjdooks/linux:
  ARM: S5PV210: serial: Fix section mismatch warning
  ARM: s3c2410_defconfig: Add new machines
  ARM: s3c6400_defconfig: Add framebuffer and basic LCD
  ARM: s3c6400_defconfig: Add RTC driver support
  ARM: s3c6400_defconfig: Enable USB host side
  ARM: s3c6400_defconfig: Add SPI driver
  ARM: s3c6400_defconfig: Update compiled machines
  ARM: S5P: Regoster clk_xusbxti clock for hsotg driver
  ARM: S3C64XX: Add USB OTG HCLK to the list of clocks
  ARM: SAMSUNG: gpio-cfg.h: update documentation
  ARM: SAMSUNG: Documentation: add documentation on GPIO code
  ARM: SAMSUNG: Fix documentation for s3c_gpio_cfgpin()
  ARM: S3C24XX: Documentation: add section on gpiolib changes
  ARM: S3C24XX: Documentation: update GPIO documentation
  ARM: S3C24XX: Documentation: update documentation overview
  ARM: SAMSUNG: Documentation: update directory layout
  ARM: SAMSUNG: Documentation: update the list of SoCs supported
parents 72da3bc0 5d66ceee
...@@ -12,6 +12,8 @@ Introduction ...@@ -12,6 +12,8 @@ Introduction
of the s3c2410 GPIO system, please read the Samsung provided of the s3c2410 GPIO system, please read the Samsung provided
data-sheet/users manual to find out the complete list. data-sheet/users manual to find out the complete list.
See Documentation/arm/Samsung/GPIO.txt for the core implemetation.
GPIOLIB GPIOLIB
------- -------
...@@ -24,8 +26,60 @@ GPIOLIB ...@@ -24,8 +26,60 @@ GPIOLIB
listed below will be removed (they may be marked as __deprecated listed below will be removed (they may be marked as __deprecated
in the near future). in the near future).
- s3c2410_gpio_getpin The following functions now either have a s3c_ specific variant
- s3c2410_gpio_setpin or are merged into gpiolib. See the definitions in
arch/arm/plat-samsung/include/plat/gpio-cfg.h:
s3c2410_gpio_setpin() gpio_set_value() or gpio_direction_output()
s3c2410_gpio_getpin() gpio_get_value() or gpio_direction_input()
s3c2410_gpio_getirq() gpio_to_irq()
s3c2410_gpio_cfgpin() s3c_gpio_cfgpin()
s3c2410_gpio_getcfg() s3c_gpio_getcfg()
s3c2410_gpio_pullup() s3c_gpio_setpull()
GPIOLIB conversion
------------------
If you need to convert your board or driver to use gpiolib from the exiting
s3c2410 api, then here are some notes on the process.
1) If your board is exclusively using an GPIO, say to control peripheral
power, then it will require to claim the gpio with gpio_request() before
it can use it.
It is recommended to check the return value, with at least WARN_ON()
during initialisation.
2) The s3c2410_gpio_cfgpin() can be directly replaced with s3c_gpio_cfgpin()
as they have the same arguments, and can either take the pin specific
values, or the more generic special-function-number arguments.
3) s3c2410_gpio_pullup() changs have the problem that whilst the
s3c2410_gpio_pullup(x, 1) can be easily translated to the
s3c_gpio_setpull(x, S3C_GPIO_PULL_NONE), the s3c2410_gpio_pullup(x, 0)
are not so easy.
The s3c2410_gpio_pullup(x, 0) case enables the pull-up (or in the case
of some of the devices, a pull-down) and as such the new API distinguishes
between the UP and DOWN case. There is currently no 'just turn on' setting
which may be required if this becomes a problem.
4) s3c2410_gpio_setpin() can be replaced by gpio_set_value(), the old call
does not implicitly configure the relevant gpio to output. The gpio
direction should be changed before using gpio_set_value().
5) s3c2410_gpio_getpin() is replaceable by gpio_get_value() if the pin
has been set to input. It is currently unknown what the behaviour is
when using gpio_get_value() on an output pin (s3c2410_gpio_getpin
would return the value the pin is supposed to be outputting).
6) s3c2410_gpio_getirq() should be directly replacable with the
gpio_to_irq() call.
The s3c2410_gpio and gpio_ calls have always operated on the same gpio
numberspace, so there is no problem with converting the gpio numbering
between the calls.
Headers Headers
...@@ -54,6 +108,11 @@ PIN Numbers ...@@ -54,6 +108,11 @@ PIN Numbers
eg S3C2410_GPA(0) or S3C2410_GPF(1). These defines are used to tell eg S3C2410_GPA(0) or S3C2410_GPF(1). These defines are used to tell
the GPIO functions which pin is to be used. the GPIO functions which pin is to be used.
With the conversion to gpiolib, there is no longer a direct conversion
from gpio pin number to register base address as in earlier kernels. This
is due to the number space required for newer SoCs where the later
GPIOs are not contiguous.
Configuring a pin Configuring a pin
----------------- -----------------
...@@ -71,6 +130,8 @@ Configuring a pin ...@@ -71,6 +130,8 @@ Configuring a pin
which would turn GPA(0) into the lowest Address line A0, and set which would turn GPA(0) into the lowest Address line A0, and set
GPE(8) to be connected to the SDIO/MMC controller's SDDAT1 line. GPE(8) to be connected to the SDIO/MMC controller's SDDAT1 line.
The s3c_gpio_cfgpin() call is a functional replacement for this call.
Reading the current configuration Reading the current configuration
--------------------------------- ---------------------------------
...@@ -82,6 +143,9 @@ Reading the current configuration ...@@ -82,6 +143,9 @@ Reading the current configuration
The return value will be from the same set of values which can be The return value will be from the same set of values which can be
passed to s3c2410_gpio_cfgpin(). passed to s3c2410_gpio_cfgpin().
The s3c_gpio_getcfg() call should be a functional replacement for
this call.
Configuring a pull-up resistor Configuring a pull-up resistor
------------------------------ ------------------------------
...@@ -95,6 +159,10 @@ Configuring a pull-up resistor ...@@ -95,6 +159,10 @@ Configuring a pull-up resistor
Where the to value is zero to set the pull-up off, and 1 to enable Where the to value is zero to set the pull-up off, and 1 to enable
the specified pull-up. Any other values are currently undefined. the specified pull-up. Any other values are currently undefined.
The s3c_gpio_setpull() offers similar functionality, but with the
ability to encode whether the pull is up or down. Currently there
is no 'just on' state, so up or down must be selected.
Getting the state of a PIN Getting the state of a PIN
-------------------------- --------------------------
...@@ -106,6 +174,9 @@ Getting the state of a PIN ...@@ -106,6 +174,9 @@ Getting the state of a PIN
This will return either zero or non-zero. Do not count on this This will return either zero or non-zero. Do not count on this
function returning 1 if the pin is set. function returning 1 if the pin is set.
This call is now implemented by the relevant gpiolib calls, convert
your board or driver to use gpiolib.
Setting the state of a PIN Setting the state of a PIN
-------------------------- --------------------------
...@@ -117,6 +188,9 @@ Setting the state of a PIN ...@@ -117,6 +188,9 @@ Setting the state of a PIN
Which sets the given pin to the value. Use 0 to write 0, and 1 to Which sets the given pin to the value. Use 0 to write 0, and 1 to
set the output to 1. set the output to 1.
This call is now implemented by the relevant gpiolib calls, convert
your board or driver to use gpiolib.
Getting the IRQ number associated with a PIN Getting the IRQ number associated with a PIN
-------------------------------------------- --------------------------------------------
...@@ -128,6 +202,9 @@ Getting the IRQ number associated with a PIN ...@@ -128,6 +202,9 @@ Getting the IRQ number associated with a PIN
Note, not all pins have an IRQ. Note, not all pins have an IRQ.
This call is now implemented by the relevant gpiolib calls, convert
your board or driver to use gpiolib.
Authour Authour
------- -------
......
...@@ -8,10 +8,16 @@ Introduction ...@@ -8,10 +8,16 @@ Introduction
The Samsung S3C24XX range of ARM9 System-on-Chip CPUs are supported The Samsung S3C24XX range of ARM9 System-on-Chip CPUs are supported
by the 's3c2410' architecture of ARM Linux. Currently the S3C2410, by the 's3c2410' architecture of ARM Linux. Currently the S3C2410,
S3C2412, S3C2413, S3C2440, S3C2442 and S3C2443 devices are supported. S3C2412, S3C2413, S3C2416 S3C2440, S3C2442, S3C2443 and S3C2450 devices
are supported.
Support for the S3C2400 and S3C24A0 series are in progress. Support for the S3C2400 and S3C24A0 series are in progress.
The S3C2416 and S3C2450 devices are very similar and S3C2450 support is
included under the arch/arm/mach-s3c2416 directory. Note, whilst core
support for these SoCs is in, work on some of the extra peripherals
and extra interrupts is still ongoing.
Configuration Configuration
------------- -------------
...@@ -209,6 +215,13 @@ GPIO ...@@ -209,6 +215,13 @@ GPIO
Newer kernels carry GPIOLIB, and support is being moved towards Newer kernels carry GPIOLIB, and support is being moved towards
this with some of the older support in line to be removed. this with some of the older support in line to be removed.
As of v2.6.34, the move towards using gpiolib support is almost
complete, and very little of the old calls are left.
See Documentation/arm/Samsung-S3C24XX/GPIO.txt for the S3C24XX specific
support and Documentation/arm/Samsung/GPIO.txt for the core Samsung
implementation.
Clock Management Clock Management
---------------- ----------------
......
Samsung GPIO implementation
===========================
Introduction
------------
This outlines the Samsung GPIO implementation and the architecture
specfic calls provided alongisde the drivers/gpio core.
S3C24XX (Legacy)
----------------
See Documentation/arm/Samsung-S3C24XX/GPIO.txt for more information
about these devices. Their implementation is being brought into line
with the core samsung implementation described in this document.
GPIOLIB integration
-------------------
The gpio implementation uses gpiolib as much as possible, only providing
specific calls for the items that require Samsung specific handling, such
as pin special-function or pull resistor control.
GPIO numbering is synchronised between the Samsung and gpiolib system.
PIN configuration
-----------------
Pin configuration is specific to the Samsung architecutre, with each SoC
registering the necessary information for the core gpio configuration
implementation to configure pins as necessary.
The s3c_gpio_cfgpin() and s3c_gpio_setpull() provide the means for a
driver or machine to change gpio configuration.
See arch/arm/plat-samsung/include/plat/gpio-cfg.h for more information
on these functions.
...@@ -13,9 +13,10 @@ Introduction ...@@ -13,9 +13,10 @@ Introduction
- S3C24XX: See Documentation/arm/Samsung-S3C24XX/Overview.txt for full list - S3C24XX: See Documentation/arm/Samsung-S3C24XX/Overview.txt for full list
- S3C64XX: S3C6400 and S3C6410 - S3C64XX: S3C6400 and S3C6410
- S5PC6440 - S5P6440
- S5P6442
S5PC100 and S5PC110 support is currently being merged - S5PC100
- S5PC110 / S5PV210
S3C24XX Systems S3C24XX Systems
...@@ -35,7 +36,10 @@ Configuration ...@@ -35,7 +36,10 @@ Configuration
unifying all the SoCs into one kernel. unifying all the SoCs into one kernel.
s5p6440_defconfig - S5P6440 specific default configuration s5p6440_defconfig - S5P6440 specific default configuration
s5p6442_defconfig - S5P6442 specific default configuration
s5pc100_defconfig - S5PC100 specific default configuration s5pc100_defconfig - S5PC100 specific default configuration
s5pc110_defconfig - S5PC110 specific default configuration
s5pv210_defconfig - S5PV210 specific default configuration
Layout Layout
...@@ -50,18 +54,27 @@ Layout ...@@ -50,18 +54,27 @@ Layout
specific information. It contains the base clock, GPIO and device definitions specific information. It contains the base clock, GPIO and device definitions
to get the system running. to get the system running.
plat-s3c is the s3c24xx/s3c64xx platform directory, although it is currently
involved in other builds this will be phased out once the relevant code is
moved elsewhere.
plat-s3c24xx is for s3c24xx specific builds, see the S3C24XX docs. plat-s3c24xx is for s3c24xx specific builds, see the S3C24XX docs.
plat-s3c64xx is for the s3c64xx specific bits, see the S3C24XX docs. plat-s5p is for s5p specific builds, and contains common support for the
S5P specific systems. Not all S5Ps use all the features in this directory
due to differences in the hardware.
Layout changes
--------------
The old plat-s3c and plat-s5pc1xx directories have been removed, with
support moved to either plat-samsung or plat-s5p as necessary. These moves
where to simplify the include and dependency issues involved with having
so many different platform directories.
plat-s5p is for s5p specific builds, more to be added. It was decided to remove plat-s5pc1xx as some of the support was already
in plat-s5p or plat-samsung, with the S5PC110 support added with S5PV210
the only user was the S5PC100. The S5PC100 specific items where moved to
arch/arm/mach-s5pc100.
[ to finish ]
Port Contributors Port Contributors
......
# #
# Automatically generated make config: don't edit # Automatically generated make config: don't edit
# Linux kernel version: 2.6.34 # Linux kernel version: 2.6.34
# Wed May 26 19:04:29 2010 # Fri May 28 19:15:48 2010
# #
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_HAVE_PWM=y CONFIG_HAVE_PWM=y
...@@ -250,12 +250,15 @@ CONFIG_S3C_BOOT_UART_FORCE_FIFO=y ...@@ -250,12 +250,15 @@ CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
CONFIG_S3C_LOWLEVEL_UART_PORT=0 CONFIG_S3C_LOWLEVEL_UART_PORT=0
CONFIG_SAMSUNG_CLKSRC=y CONFIG_SAMSUNG_CLKSRC=y
CONFIG_S3C_GPIO_CFG_S3C24XX=y CONFIG_S3C_GPIO_CFG_S3C24XX=y
CONFIG_S3C_GPIO_PULL_UPDOWN=y
CONFIG_S3C_GPIO_PULL_UP=y CONFIG_S3C_GPIO_PULL_UP=y
CONFIG_SAMSUNG_GPIO_EXTRA=0 CONFIG_SAMSUNG_GPIO_EXTRA=0
CONFIG_S3C_GPIO_SPACE=0 CONFIG_S3C_GPIO_SPACE=0
CONFIG_S3C_ADC=y CONFIG_S3C_ADC=y
CONFIG_S3C_DEV_HSMMC=y CONFIG_S3C_DEV_HSMMC=y
CONFIG_S3C_DEV_HSMMC1=y
CONFIG_S3C_DEV_HWMON=y CONFIG_S3C_DEV_HWMON=y
CONFIG_S3C_DEV_FB=y
CONFIG_S3C_DEV_USB_HOST=y CONFIG_S3C_DEV_USB_HOST=y
CONFIG_S3C_DEV_WDT=y CONFIG_S3C_DEV_WDT=y
CONFIG_S3C_DEV_NAND=y CONFIG_S3C_DEV_NAND=y
...@@ -322,11 +325,13 @@ CONFIG_MACH_SMDK2413=y ...@@ -322,11 +325,13 @@ CONFIG_MACH_SMDK2413=y
CONFIG_MACH_S3C2413=y CONFIG_MACH_S3C2413=y
CONFIG_MACH_SMDK2412=y CONFIG_MACH_SMDK2412=y
CONFIG_MACH_VSTMS=y CONFIG_MACH_VSTMS=y
CONFIG_CPU_S3C2416=y
CONFIG_S3C2416_DMA=y
# #
# S3C2416 Machines # S3C2416 Machines
# #
# CONFIG_MACH_SMDK2416 is not set CONFIG_MACH_SMDK2416=y
CONFIG_CPU_S3C2440=y CONFIG_CPU_S3C2440=y
CONFIG_CPU_S3C2442=y CONFIG_CPU_S3C2442=y
CONFIG_CPU_S3C244X=y CONFIG_CPU_S3C244X=y
...@@ -338,9 +343,9 @@ CONFIG_S3C2440_DMA=y ...@@ -338,9 +343,9 @@ CONFIG_S3C2440_DMA=y
# S3C2440 and S3C2442 Machines # S3C2440 and S3C2442 Machines
# #
CONFIG_MACH_ANUBIS=y CONFIG_MACH_ANUBIS=y
# CONFIG_MACH_NEO1973_GTA02 is not set CONFIG_MACH_NEO1973_GTA02=y
CONFIG_MACH_OSIRIS=y CONFIG_MACH_OSIRIS=y
# CONFIG_MACH_OSIRIS_DVS is not set CONFIG_MACH_OSIRIS_DVS=m
CONFIG_MACH_RX3715=y CONFIG_MACH_RX3715=y
CONFIG_ARCH_S3C2440=y CONFIG_ARCH_S3C2440=y
CONFIG_MACH_NEXCODER_2440=y CONFIG_MACH_NEXCODER_2440=y
...@@ -348,7 +353,7 @@ CONFIG_SMDK2440_CPU2440=y ...@@ -348,7 +353,7 @@ CONFIG_SMDK2440_CPU2440=y
CONFIG_SMDK2440_CPU2442=y CONFIG_SMDK2440_CPU2442=y
CONFIG_MACH_AT2440EVB=y CONFIG_MACH_AT2440EVB=y
CONFIG_MACH_MINI2440=y CONFIG_MACH_MINI2440=y
# CONFIG_MACH_RX1950 is not set CONFIG_MACH_RX1950=y
CONFIG_CPU_S3C2443=y CONFIG_CPU_S3C2443=y
CONFIG_S3C2443_DMA=y CONFIG_S3C2443_DMA=y
...@@ -1302,6 +1307,7 @@ CONFIG_INPUT_POWERMATE=m ...@@ -1302,6 +1307,7 @@ CONFIG_INPUT_POWERMATE=m
CONFIG_INPUT_YEALINK=m CONFIG_INPUT_YEALINK=m
CONFIG_INPUT_CM109=m CONFIG_INPUT_CM109=m
CONFIG_INPUT_UINPUT=m CONFIG_INPUT_UINPUT=m
# CONFIG_INPUT_PCF50633_PMU is not set
# CONFIG_INPUT_PCF8574 is not set # CONFIG_INPUT_PCF8574 is not set
CONFIG_INPUT_GPIO_ROTARY_ENCODER=m CONFIG_INPUT_GPIO_ROTARY_ENCODER=m
...@@ -1490,7 +1496,16 @@ CONFIG_GPIOLIB=y ...@@ -1490,7 +1496,16 @@ CONFIG_GPIOLIB=y
# AC97 GPIO expanders: # AC97 GPIO expanders:
# #
# CONFIG_W1 is not set # CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set CONFIG_POWER_SUPPLY=y
# CONFIG_POWER_SUPPLY_DEBUG is not set
# CONFIG_PDA_POWER is not set
# CONFIG_APM_POWER is not set
# CONFIG_TEST_POWER is not set
# CONFIG_BATTERY_DS2760 is not set
# CONFIG_BATTERY_DS2782 is not set
# CONFIG_BATTERY_BQ27x00 is not set
# CONFIG_BATTERY_MAX17040 is not set
# CONFIG_CHARGER_PCF50633 is not set
CONFIG_HWMON=y CONFIG_HWMON=y
CONFIG_HWMON_VID=m CONFIG_HWMON_VID=m
# CONFIG_HWMON_DEBUG_CHIP is not set # CONFIG_HWMON_DEBUG_CHIP is not set
...@@ -1607,7 +1622,7 @@ CONFIG_MFD_SM501=y ...@@ -1607,7 +1622,7 @@ CONFIG_MFD_SM501=y
# CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_PASIC3 is not set
# CONFIG_HTC_I2CPLD is not set # CONFIG_HTC_I2CPLD is not set
# CONFIG_UCB1400_CORE is not set # CONFIG_UCB1400_CORE is not set
# CONFIG_TPS65010 is not set CONFIG_TPS65010=m
# CONFIG_TWL4030_CORE is not set # CONFIG_TWL4030_CORE is not set
# CONFIG_MFD_TMIO is not set # CONFIG_MFD_TMIO is not set
# CONFIG_MFD_T7L66XB is not set # CONFIG_MFD_T7L66XB is not set
...@@ -1620,8 +1635,10 @@ CONFIG_MFD_SM501=y ...@@ -1620,8 +1635,10 @@ CONFIG_MFD_SM501=y
# CONFIG_MFD_WM831X is not set # CONFIG_MFD_WM831X is not set
# CONFIG_MFD_WM8350_I2C is not set # CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_WM8994 is not set # CONFIG_MFD_WM8994 is not set
# CONFIG_MFD_PCF50633 is not set CONFIG_MFD_PCF50633=y
# CONFIG_MFD_MC13783 is not set # CONFIG_MFD_MC13783 is not set
# CONFIG_PCF50633_ADC is not set
CONFIG_PCF50633_GPIO=y
# CONFIG_AB3100_CORE is not set # CONFIG_AB3100_CORE is not set
# CONFIG_EZX_PCAP is not set # CONFIG_EZX_PCAP is not set
# CONFIG_AB4500_CORE is not set # CONFIG_AB4500_CORE is not set
...@@ -1737,6 +1754,7 @@ CONFIG_SND_S3C24XX_SOC_I2S=y ...@@ -1737,6 +1754,7 @@ CONFIG_SND_S3C24XX_SOC_I2S=y
CONFIG_SND_S3C_I2SV2_SOC=m CONFIG_SND_S3C_I2SV2_SOC=m
CONFIG_SND_S3C2412_SOC_I2S=m CONFIG_SND_S3C2412_SOC_I2S=m
CONFIG_SND_S3C_SOC_AC97=m CONFIG_SND_S3C_SOC_AC97=m
# CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753 is not set
CONFIG_SND_S3C24XX_SOC_JIVE_WM8750=m CONFIG_SND_S3C24XX_SOC_JIVE_WM8750=m
CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710=m CONFIG_SND_S3C24XX_SOC_SMDK2443_WM9710=m
CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650=m CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650=m
...@@ -2045,6 +2063,7 @@ CONFIG_RTC_INTF_DEV=y ...@@ -2045,6 +2063,7 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_BQ4802 is not set # CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_RP5C01 is not set # CONFIG_RTC_DRV_RP5C01 is not set
# CONFIG_RTC_DRV_V3020 is not set # CONFIG_RTC_DRV_V3020 is not set
# CONFIG_RTC_DRV_PCF50633 is not set
# #
# on-CPU RTC drivers # on-CPU RTC drivers
......
This diff is collapsed.
...@@ -258,6 +258,12 @@ static struct clk init_clocks[] = { ...@@ -258,6 +258,12 @@ static struct clk init_clocks[] = {
.parent = &clk_h, .parent = &clk_h,
.enable = s3c64xx_hclk_ctrl, .enable = s3c64xx_hclk_ctrl,
.ctrlbit = S3C_CLKCON_HCLK_HSMMC2, .ctrlbit = S3C_CLKCON_HCLK_HSMMC2,
}, {
.name = "otg",
.id = -1,
.parent = &clk_h,
.enable = s3c64xx_hclk_ctrl,
.ctrlbit = S3C_CLKCON_HCLK_USB,
}, { }, {
.name = "timers", .name = "timers",
.id = -1, .id = -1,
......
...@@ -148,6 +148,7 @@ static struct clk *s5p_clks[] __initdata = { ...@@ -148,6 +148,7 @@ static struct clk *s5p_clks[] __initdata = {
&clk_fout_vpll, &clk_fout_vpll,
&clk_arm, &clk_arm,
&clk_vpll, &clk_vpll,
&clk_xusbxti,
}; };
void __init s5p_register_clocks(unsigned long xtal_freq) void __init s5p_register_clocks(unsigned long xtal_freq)
......
...@@ -43,6 +43,11 @@ struct s3c_gpio_chip; ...@@ -43,6 +43,11 @@ struct s3c_gpio_chip;
* layouts. Provide an point to vector control routine and provide any * layouts. Provide an point to vector control routine and provide any
* per-bank configuration information that other systems such as the * per-bank configuration information that other systems such as the
* external interrupt code will need. * external interrupt code will need.
*
* @sa s3c_gpio_cfgpin
* @sa s3c_gpio_getcfg
* @sa s3c_gpio_setpull
* @sa s3c_gpio_getpull
*/ */
struct s3c_gpio_cfg { struct s3c_gpio_cfg {
unsigned int cfg_eint; unsigned int cfg_eint;
...@@ -70,11 +75,25 @@ struct s3c_gpio_cfg { ...@@ -70,11 +75,25 @@ struct s3c_gpio_cfg {
/** /**
* s3c_gpio_cfgpin() - Change the GPIO function of a pin. * s3c_gpio_cfgpin() - Change the GPIO function of a pin.
* @pin pin The pin number to configure. * @pin pin The pin number to configure.
* @pin to The configuration for the pin's function. * @to to The configuration for the pin's function.
* *
* Configure which function is actually connected to the external * Configure which function is actually connected to the external
* pin, such as an gpio input, output or some form of special function * pin, such as an gpio input, output or some form of special function
* connected to an internal peripheral block. * connected to an internal peripheral block.
*
* The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT
* or S3C_GPIO_SFN() to indicate one of the possible values that the helper
* will then generate the correct bit mask and shift for the configuration.
*
* If a bank of GPIOs all needs to be set to special-function 2, then
* the following code will work:
*
* for (gpio = start; gpio < end; gpio++)
* s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
*
* The @to parameter can also be a specific value already shifted to the
* correct position in the control register, although these are discouraged
* in newer kernels and are only being kept for compatibility.
*/ */
extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
...@@ -108,6 +127,8 @@ extern unsigned s3c_gpio_getcfg(unsigned int pin); ...@@ -108,6 +127,8 @@ extern unsigned s3c_gpio_getcfg(unsigned int pin);
* This function sets the state of the pull-{up,down} resistor for the * This function sets the state of the pull-{up,down} resistor for the
* specified pin. It will return 0 if successfull, or a negative error * specified pin. It will return 0 if successfull, or a negative error
* code if the pin cannot support the requested pull setting. * code if the pin cannot support the requested pull setting.
*
* @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP.
*/ */
extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull); extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull);
......
...@@ -119,7 +119,7 @@ static int s5p_serial_probe(struct platform_device *pdev) ...@@ -119,7 +119,7 @@ static int s5p_serial_probe(struct platform_device *pdev)
return s3c24xx_serial_probe(pdev, s5p_uart_inf[pdev->id]); return s3c24xx_serial_probe(pdev, s5p_uart_inf[pdev->id]);
} }
static struct platform_driver s5p_serial_drv = { static struct platform_driver s5p_serial_driver = {
.probe = s5p_serial_probe, .probe = s5p_serial_probe,
.remove = __devexit_p(s3c24xx_serial_remove), .remove = __devexit_p(s3c24xx_serial_remove),
.driver = { .driver = {
...@@ -130,19 +130,19 @@ static struct platform_driver s5p_serial_drv = { ...@@ -130,19 +130,19 @@ static struct platform_driver s5p_serial_drv = {
static int __init s5pv210_serial_console_init(void) static int __init s5pv210_serial_console_init(void)
{ {
return s3c24xx_serial_initconsole(&s5p_serial_drv, s5p_uart_inf); return s3c24xx_serial_initconsole(&s5p_serial_driver, s5p_uart_inf);
} }
console_initcall(s5pv210_serial_console_init); console_initcall(s5pv210_serial_console_init);
static int __init s5p_serial_init(void) static int __init s5p_serial_init(void)
{ {
return s3c24xx_serial_init(&s5p_serial_drv, *s5p_uart_inf); return s3c24xx_serial_init(&s5p_serial_driver, *s5p_uart_inf);
} }
static void __exit s5p_serial_exit(void) static void __exit s5p_serial_exit(void)
{ {
platform_driver_unregister(&s5p_serial_drv); platform_driver_unregister(&s5p_serial_driver);
} }
module_init(s5p_serial_init); module_init(s5p_serial_init);
......
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