Commit 04e85958 authored by Tong Liu01's avatar Tong Liu01 Committed by Alex Deucher

drm/amdgpu: fix incorrect pcie_gen_mask in passthrough case

[why]
Passthrough case is treated as root bus and pcie_gen_mask is set as
default value that does not support GEN 3 and GEN 4 for PCIe link
speed. So PCIe link speed will be downgraded at smu hw init in
passthrough condition

[how]
Move get pci info after detect virtualization and check if it is
passthrough case when set pcie_gen_mask
Signed-off-by: default avatarTong Liu01 <Tong.Liu01@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8789989b
...@@ -3814,8 +3814,6 @@ int amdgpu_device_init(struct amdgpu_device *adev, ...@@ -3814,8 +3814,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)adev->rmmio_base); DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)adev->rmmio_base);
DRM_INFO("register mmio size: %u\n", (unsigned)adev->rmmio_size); DRM_INFO("register mmio size: %u\n", (unsigned)adev->rmmio_size);
amdgpu_device_get_pcie_info(adev);
if (amdgpu_mcbp) if (amdgpu_mcbp)
DRM_INFO("MCBP is enabled\n"); DRM_INFO("MCBP is enabled\n");
...@@ -3831,6 +3829,8 @@ int amdgpu_device_init(struct amdgpu_device *adev, ...@@ -3831,6 +3829,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
/* detect hw virtualization here */ /* detect hw virtualization here */
amdgpu_detect_virtualization(adev); amdgpu_detect_virtualization(adev);
amdgpu_device_get_pcie_info(adev);
r = amdgpu_device_get_job_timeout_settings(adev); r = amdgpu_device_get_job_timeout_settings(adev);
if (r) { if (r) {
dev_err(adev->dev, "invalid lockup_timeout parameter syntax\n"); dev_err(adev->dev, "invalid lockup_timeout parameter syntax\n");
...@@ -5588,7 +5588,7 @@ static void amdgpu_device_get_pcie_info(struct amdgpu_device *adev) ...@@ -5588,7 +5588,7 @@ static void amdgpu_device_get_pcie_info(struct amdgpu_device *adev)
adev->pm.pcie_mlw_mask = amdgpu_pcie_lane_cap; adev->pm.pcie_mlw_mask = amdgpu_pcie_lane_cap;
/* covers APUs as well */ /* covers APUs as well */
if (pci_is_root_bus(adev->pdev->bus)) { if (pci_is_root_bus(adev->pdev->bus) && !amdgpu_passthrough(adev)) {
if (adev->pm.pcie_gen_mask == 0) if (adev->pm.pcie_gen_mask == 0)
adev->pm.pcie_gen_mask = AMDGPU_DEFAULT_PCIE_GEN_MASK; adev->pm.pcie_gen_mask = AMDGPU_DEFAULT_PCIE_GEN_MASK;
if (adev->pm.pcie_mlw_mask == 0) if (adev->pm.pcie_mlw_mask == 0)
......
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