Commit 05734d59 authored by Ralf Bächle's avatar Ralf Bächle Committed by Greg Kroah-Hartman

[4/3] PCI quirks -- MIPS.

Remove the bazillion of pcibios_fixups[] arrays on MIPS and replace them
with DECLARE_PCI_FIXUP_HEADER / DECLARE_PCI_FIXUP_FINAL where the array
definition was non-empty.
Signed-off-by: default avatarGreg Kroah-Hartman <greg@kroah.com>
parent b9c25eae
......@@ -60,13 +60,7 @@ static void atlas_saa9730_base_fixup (struct pci_dev *pdev)
printk ("saa9730_base = %x\n", saa9730_base);
}
#endif
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
atlas_saa9730_base_fixup);
struct pci_fixup pcibios_fixups[] __initdata = {
#ifdef CONFIG_KGDB
{PCI_FIXUP_HEADER, PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
atlas_saa9730_base_fixup},
#endif
{ 0 }
};
......@@ -102,7 +102,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
return irq_tab_alchemy[slot][pin];
}
struct pci_fixup pcibios_fixups[] __initdata = {
{ 0 }
};
......@@ -42,7 +42,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
return irq_tab_capcella[slot][pin];
}
struct pci_fixup pcibios_fixups[] __initdata = {
{ .pass = 0, },
};
......@@ -41,6 +41,9 @@ static void qube_raq_via_bmIDE_fixup(struct pci_dev *dev)
pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7);
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
qube_raq_via_bmIDE_fixup);
static void qube_raq_galileo_fixup(struct pci_dev *dev)
{
unsigned short galileo_id;
......@@ -73,13 +76,8 @@ static void qube_raq_galileo_fixup(struct pci_dev *dev)
}
}
struct pci_fixup pcibios_fixups[] __initdata = {
{PCI_FIXUP_HEADER, PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1,
qube_raq_via_bmIDE_fixup},
{PCI_FIXUP_HEADER, PCI_VENDOR_ID_GALILEO, PCI_ANY_ID,
qube_raq_galileo_fixup},
0
};
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_GALILEO, PCI_ANY_ID,
qube_raq_galileo_fixup);
static char irq_tab_cobalt[] __initdata = {
[COBALT_PCICONF_CPU] = 0,
......
......@@ -17,8 +17,5 @@ static void ddb5074_fixup(struct pci_dev *dev)
pci_write_config_byte(dev, 0x7e, t8);
}
struct pci_fixup pcibios_fixups[] __initdata = {
{ PCI_FIXUP_FINAL, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101,
ddb5074_fixup },
{0}
};
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101,
ddb5074_fixup);
......@@ -41,6 +41,11 @@ static void ddb5477_fixup(struct pci_dev *dev)
pci_write_config_byte(dev, 0x41, old | 0xd0);
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
ddb5477_fixup);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1535,
ddb5477_fixup);
/*
* Fixup baseboard AMD chip so that tx does not underflow.
* bcr_18 |= 0x0800
......@@ -69,12 +74,5 @@ static void ddb5477_amd_lance_fixup(struct pci_dev *dev)
outw(temp, ioaddr + PCNET32_WIO_BDP);
}
struct pci_fixup pcibios_fixups[] __initdata = {
{ PCI_FIXUP_FINAL, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
ddb5477_fixup },
{ PCI_FIXUP_FINAL, PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1535,
ddb5477_fixup },
{ PCI_FIXUP_FINAL, PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE,
ddb5477_amd_lance_fixup },
{0}
};
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE,
ddb5477_amd_lance_fixup);
......@@ -44,7 +44,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
return irq_tab_mace[slot][pin];
}
struct pci_fixup pcibios_fixups[] = {
{0}
};
......@@ -36,7 +36,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
return 0;
panic("Whooops in pcibios_map_irq");
}
struct pci_fixup pcibios_fixups[] = {
{0}
};
......@@ -4,7 +4,3 @@
void __init pcibios_fixup_irqs(void)
{
}
struct pci_fixup pcibios_fixups[] __initdata = {
{ 0 }
};
......@@ -79,6 +79,8 @@ static void __init malta_piix_func0_fixup(struct pci_dev *pdev)
}
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,
malta_piix_func0_fixup);
static void __init malta_piix_func1_fixup(struct pci_dev *pdev)
{
......@@ -96,10 +98,5 @@ static void __init malta_piix_func1_fixup(struct pci_dev *pdev)
}
}
struct pci_fixup pcibios_fixups[] __initdata = {
{PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,
malta_piix_func0_fixup},
{PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB,
malta_piix_func1_fixup},
{ 0 }
};
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB,
malta_piix_func1_fixup);
......@@ -42,7 +42,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
return irq_tab_mpc30x[slot];
}
struct pci_fixup pcibios_fixups[] __initdata = {
{ .pass = 0, },
};
......@@ -33,7 +33,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
return 0;
panic("Whooops in pcibios_map_irq");
}
struct pci_fixup pcibios_fixups[] = {
{0}
};
......@@ -29,7 +29,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
return -1;
}
struct pci_fixup pcibios_fixups[] = {
{0}
};
......@@ -82,7 +82,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
return irq_tab_rm200[slot][pin];
}
struct pci_fixup pcibios_fixups[] = {
{0}
};
......@@ -58,7 +58,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
return irq;
}
struct pci_fixup pcibios_fixups[] __initdata = {
{ .pass = 0, },
};
......@@ -77,7 +77,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
return irq;
}
struct pci_fixup pcibios_fixups[] __initdata = {
{ .pass = 0, },
};
......@@ -33,7 +33,3 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
return 3; /* Everything goes to one irq bit */
}
struct pci_fixup pcibios_fixups[] = {
{0}
};
......@@ -329,6 +329,9 @@ static void __init pci_fixup_ioc3(struct pci_dev *d)
pci_disable_swapping(d);
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3,
pci_fixup_ioc3);
static void __init pci_fixup_isp1020(struct pci_dev *d)
{
struct bridge_controller *bc = BRIDGE_CONTROLLER(d->bus);
......@@ -353,6 +356,9 @@ static void __init pci_fixup_isp1020(struct pci_dev *d)
pci_enable_swapping(d);
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP1020,
pci_fixup_isp1020);
static void __init pci_fixup_isp2x00(struct pci_dev *d)
{
struct bridge_controller *bc = BRIDGE_CONTROLLER(d->bus);
......@@ -427,14 +433,7 @@ static void __init pci_fixup_isp2x00(struct pci_dev *d)
/*d->resource[1].flags |= 1; */
}
struct pci_fixup pcibios_fixups[] = {
{PCI_FIXUP_HEADER, PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC3,
pci_fixup_ioc3},
{PCI_FIXUP_HEADER, PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP1020,
pci_fixup_isp1020},
{PCI_FIXUP_HEADER, PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100,
pci_fixup_isp2x00},
{PCI_FIXUP_HEADER, PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200,
pci_fixup_isp2x00},
{0}
};
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100,
pci_fixup_isp2x00);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200,
pci_fixup_isp2x00);
......@@ -279,7 +279,3 @@ static int __init sb1250_pcibios_init(void)
return 0;
}
arch_initcall(sb1250_pcibios_init);
struct pci_fixup pcibios_fixups[] = {
{0}
};
......@@ -414,11 +414,6 @@ struct pci_ops titan_pci_ops = {
titan_ht_config_write_dword
};
struct pci_fixup pcibios_fixups[] = {
{0}
};
void __init pcibios_fixup_bus(struct pci_bus *c)
{
titan_ht_pcibios_fixup_bus(c);
......
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