Commit 05d75f8a authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Jiri Slaby

perf/x86: Correctly use FEATURE_PDCM

commit c9b08884 upstream.

The current code simply assumes Intel Arch PerfMon v2+ to have
the IA32_PERF_CAPABILITIES MSR; the SDM specifies that we should check
CPUID[1].ECX[15] (aka, FEATURE_PDCM) instead.

This was found by KVM which implements v2+ but didn't provide the
capabilities MSR. Change the code to DTRT; KVM will also implement the
MSR and return 0.

Cc: pbonzini@redhat.com
Reported-by: default avatar"Michael S. Tsirkin" <mst@redhat.com>
Suggested-by: default avatarEduardo Habkost <ehabkost@redhat.com>
Signed-off-by: default avatarPeter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/20140203132903.GI8874@twins.programming.kicks-ass.netSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
parent e1c34dac
...@@ -2288,10 +2288,7 @@ __init int intel_pmu_init(void) ...@@ -2288,10 +2288,7 @@ __init int intel_pmu_init(void)
if (version > 1) if (version > 1)
x86_pmu.num_counters_fixed = max((int)edx.split.num_counters_fixed, 3); x86_pmu.num_counters_fixed = max((int)edx.split.num_counters_fixed, 3);
/* if (boot_cpu_has(X86_FEATURE_PDCM)) {
* v2 and above have a perf capabilities MSR
*/
if (version > 1) {
u64 capabilities; u64 capabilities;
rdmsrl(MSR_IA32_PERF_CAPABILITIES, capabilities); rdmsrl(MSR_IA32_PERF_CAPABILITIES, capabilities);
......
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