Commit 0708ed7c authored by Allen-KH Cheng's avatar Allen-KH Cheng Committed by Matthias Brugger
parent b4b75bac
......@@ -1344,6 +1344,25 @@ dither0: dither@1400e000 {
mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>;
};
dsi0: dsi@14010000 {
compatible = "mediatek,mt8183-dsi";
reg = <0 0x14010000 0 0x1000>;
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&mmsys CLK_MM_DSI0>,
<&mmsys CLK_MM_DSI_DSI0>,
<&mipi_tx0>;
clock-names = "engine", "digital", "hs";
phys = <&mipi_tx0>;
phy-names = "dphy";
power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;
resets = <&mmsys MT8192_MMSYS_SW0_RST_B_DISP_DSI0>;
status = "disabled";
port {
dsi_out: endpoint { };
};
};
ovl_2l2: ovl@14014000 {
compatible = "mediatek,mt8192-disp-ovl-2l";
reg = <0 0x14014000 0 0x1000>;
......
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