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Kirill Smelkov
linux
Commits
078a9b03
Commit
078a9b03
authored
Jan 31, 2006
by
Linus Torvalds
Browse files
Options
Browse Files
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Plain Diff
Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/bnx2-2.6
parents
e1762ec6
206cc83c
Changes
3
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Showing
3 changed files
with
643 additions
and
524 deletions
+643
-524
drivers/net/bnx2.c
drivers/net/bnx2.c
+199
-109
drivers/net/bnx2.h
drivers/net/bnx2.h
+18
-16
drivers/net/bnx2_fw.h
drivers/net/bnx2_fw.h
+426
-399
No files found.
drivers/net/bnx2.c
View file @
078a9b03
/* bnx2.c: Broadcom NX2 network driver.
*
* Copyright (c) 2004, 2005 Broadcom Corporation
* Copyright (c) 2004, 2005
, 2006
Broadcom Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -14,8 +14,8 @@
#define DRV_MODULE_NAME "bnx2"
#define PFX DRV_MODULE_NAME ": "
#define DRV_MODULE_VERSION "1.4.3
0
"
#define DRV_MODULE_RELDATE "
October 11, 2005
"
#define DRV_MODULE_VERSION "1.4.3
1
"
#define DRV_MODULE_RELDATE "
January 19, 2006
"
#define RUN_AT(x) (jiffies + (x))
...
...
@@ -315,6 +315,10 @@ bnx2_enable_int(struct bnx2 *bp)
{
u32
val
;
REG_WR
(
bp
,
BNX2_PCICFG_INT_ACK_CMD
,
BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID
|
BNX2_PCICFG_INT_ACK_CMD_MASK_INT
|
bp
->
last_status_idx
);
REG_WR
(
bp
,
BNX2_PCICFG_INT_ACK_CMD
,
BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID
|
bp
->
last_status_idx
);
...
...
@@ -1171,7 +1175,8 @@ bnx2_init_5708s_phy(struct bnx2 *bp)
}
if
((
CHIP_ID
(
bp
)
==
CHIP_ID_5708_A0
)
||
(
CHIP_ID
(
bp
)
==
CHIP_ID_5708_B0
))
{
(
CHIP_ID
(
bp
)
==
CHIP_ID_5708_B0
)
||
(
CHIP_ID
(
bp
)
==
CHIP_ID_5708_B1
))
{
/* increase tx signal amplitude */
bnx2_write_phy
(
bp
,
BCM5708S_BLK_ADDR
,
BCM5708S_BLK_ADDR_TX_MISC
);
...
...
@@ -1326,44 +1331,78 @@ bnx2_set_mac_loopback(struct bnx2 *bp)
return
0
;
}
static
int
bnx2_test_link
(
struct
bnx2
*
);
static
int
bnx2_set_phy_loopback
(
struct
bnx2
*
bp
)
{
u32
mac_mode
;
int
rc
,
i
;
spin_lock_bh
(
&
bp
->
phy_lock
);
rc
=
bnx2_write_phy
(
bp
,
MII_BMCR
,
BMCR_LOOPBACK
|
BMCR_FULLDPLX
|
BMCR_SPEED1000
);
spin_unlock_bh
(
&
bp
->
phy_lock
);
if
(
rc
)
return
rc
;
for
(
i
=
0
;
i
<
10
;
i
++
)
{
if
(
bnx2_test_link
(
bp
)
==
0
)
break
;
udelay
(
10
);
}
mac_mode
=
REG_RD
(
bp
,
BNX2_EMAC_MODE
);
mac_mode
&=
~
(
BNX2_EMAC_MODE_PORT
|
BNX2_EMAC_MODE_HALF_DUPLEX
|
BNX2_EMAC_MODE_MAC_LOOP
|
BNX2_EMAC_MODE_FORCE_LINK
|
BNX2_EMAC_MODE_25G
);
mac_mode
|=
BNX2_EMAC_MODE_PORT_GMII
;
REG_WR
(
bp
,
BNX2_EMAC_MODE
,
mac_mode
);
bp
->
link_up
=
1
;
return
0
;
}
static
int
bnx2_fw_sync
(
struct
bnx2
*
bp
,
u32
msg_data
)
bnx2_fw_sync
(
struct
bnx2
*
bp
,
u32
msg_data
,
int
silent
)
{
int
i
;
u32
val
;
if
(
bp
->
fw_timed_out
)
return
-
EBUSY
;
bp
->
fw_wr_seq
++
;
msg_data
|=
bp
->
fw_wr_seq
;
REG_WR_IND
(
bp
,
bp
->
shmem_base
+
BNX2_DRV_MB
,
msg_data
);
/* wait for an acknowledgement. */
for
(
i
=
0
;
i
<
(
FW_ACK_TIME_OUT_MS
*
1000
)
/
5
;
i
++
)
{
udelay
(
5
);
for
(
i
=
0
;
i
<
(
FW_ACK_TIME_OUT_MS
/
10
)
;
i
++
)
{
msleep
(
10
);
val
=
REG_RD_IND
(
bp
,
bp
->
shmem_base
+
BNX2_FW_MB
);
if
((
val
&
BNX2_FW_MSG_ACK
)
==
(
msg_data
&
BNX2_DRV_MSG_SEQ
))
break
;
}
if
((
msg_data
&
BNX2_DRV_MSG_DATA
)
==
BNX2_DRV_MSG_DATA_WAIT0
)
return
0
;
/* If we timed out, inform the firmware that this is the case. */
if
(((
val
&
BNX2_FW_MSG_ACK
)
!=
(
msg_data
&
BNX2_DRV_MSG_SEQ
))
&&
((
msg_data
&
BNX2_DRV_MSG_DATA
)
!=
BNX2_DRV_MSG_DATA_WAIT0
))
{
if
((
val
&
BNX2_FW_MSG_ACK
)
!=
(
msg_data
&
BNX2_DRV_MSG_SEQ
))
{
if
(
!
silent
)
printk
(
KERN_ERR
PFX
"fw sync timeout, reset code = "
"%x
\n
"
,
msg_data
);
msg_data
&=
~
BNX2_DRV_MSG_CODE
;
msg_data
|=
BNX2_DRV_MSG_CODE_FW_TIMEOUT
;
REG_WR_IND
(
bp
,
bp
->
shmem_base
+
BNX2_DRV_MB
,
msg_data
);
bp
->
fw_timed_out
=
1
;
return
-
EBUSY
;
}
if
((
val
&
BNX2_FW_MSG_STATUS_MASK
)
!=
BNX2_FW_MSG_STATUS_OK
)
return
-
EIO
;
return
0
;
}
...
...
@@ -1657,7 +1696,7 @@ bnx2_rx_int(struct bnx2 *bp, int budget)
rmb
();
while
(
sw_cons
!=
hw_cons
)
{
unsigned
int
len
;
u
16
status
;
u
32
status
;
struct
sw_bd
*
rx_buf
;
struct
sk_buff
*
skb
;
...
...
@@ -1673,7 +1712,7 @@ bnx2_rx_int(struct bnx2 *bp, int budget)
rx_hdr
=
(
struct
l2_fhdr
*
)
skb
->
data
;
len
=
rx_hdr
->
l2_fhdr_pkt_len
-
4
;
if
(
rx_hdr
->
l2_fhdr_errors
&
if
(
(
status
=
rx_hdr
->
l2_fhdr_status
)
&
(
L2_FHDR_ERRORS_BAD_CRC
|
L2_FHDR_ERRORS_PHY_DECODE
|
L2_FHDR_ERRORS_ALIGNMENT
|
...
...
@@ -1732,15 +1771,13 @@ bnx2_rx_int(struct bnx2 *bp, int budget)
}
status
=
rx_hdr
->
l2_fhdr_status
;
skb
->
ip_summed
=
CHECKSUM_NONE
;
if
(
bp
->
rx_csum
&&
(
status
&
(
L2_FHDR_STATUS_TCP_SEGMENT
|
L2_FHDR_STATUS_UDP_DATAGRAM
)))
{
u16
cksum
=
rx_hdr
->
l2_fhdr_tcp_udp_xsum
;
if
(
cksum
==
0xffff
)
if
(
likely
((
status
&
(
L2_FHDR_ERRORS_TCP_XSUM
|
L2_FHDR_ERRORS_UDP_XSUM
))
==
0
))
skb
->
ip_summed
=
CHECKSUM_UNNECESSARY
;
}
...
...
@@ -1794,7 +1831,7 @@ static irqreturn_t
bnx2_msi
(
int
irq
,
void
*
dev_instance
,
struct
pt_regs
*
regs
)
{
struct
net_device
*
dev
=
dev_instance
;
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
prefetch
(
bp
->
status_blk
);
REG_WR
(
bp
,
BNX2_PCICFG_INT_ACK_CMD
,
...
...
@@ -1814,7 +1851,7 @@ static irqreturn_t
bnx2_interrupt
(
int
irq
,
void
*
dev_instance
,
struct
pt_regs
*
regs
)
{
struct
net_device
*
dev
=
dev_instance
;
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
/* When using INTx, it is possible for the interrupt to arrive
* at the CPU before the status block posted prior to the
...
...
@@ -1859,7 +1896,7 @@ bnx2_has_work(struct bnx2 *bp)
static
int
bnx2_poll
(
struct
net_device
*
dev
,
int
*
budget
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
if
((
bp
->
status_blk
->
status_attn_bits
&
STATUS_ATTN_BITS_LINK_STATE
)
!=
...
...
@@ -1891,9 +1928,20 @@ bnx2_poll(struct net_device *dev, int *budget)
if
(
!
bnx2_has_work
(
bp
))
{
netif_rx_complete
(
dev
);
if
(
likely
(
bp
->
flags
&
USING_MSI_FLAG
))
{
REG_WR
(
bp
,
BNX2_PCICFG_INT_ACK_CMD
,
BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID
|
bp
->
last_status_idx
);
return
0
;
}
REG_WR
(
bp
,
BNX2_PCICFG_INT_ACK_CMD
,
BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID
|
BNX2_PCICFG_INT_ACK_CMD_MASK_INT
|
bp
->
last_status_idx
);
REG_WR
(
bp
,
BNX2_PCICFG_INT_ACK_CMD
,
BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID
|
bp
->
last_status_idx
);
BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID
|
bp
->
last_status_idx
);
return
0
;
}
...
...
@@ -1906,7 +1954,7 @@ bnx2_poll(struct net_device *dev, int *budget)
static
void
bnx2_set_rx_mode
(
struct
net_device
*
dev
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
u32
rx_mode
,
sort_mode
;
int
i
;
...
...
@@ -1916,11 +1964,11 @@ bnx2_set_rx_mode(struct net_device *dev)
BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG
);
sort_mode
=
1
|
BNX2_RPM_SORT_USER0_BC_EN
;
#ifdef BCM_VLAN
if
(
!
bp
->
vlgrp
)
{
if
(
!
bp
->
vlgrp
&&
!
(
bp
->
flags
&
ASF_ENABLE_FLAG
))
rx_mode
|=
BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG
;
}
#else
rx_mode
|=
BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG
;
if
(
!
(
bp
->
flags
&
ASF_ENABLE_FLAG
))
rx_mode
|=
BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG
;
#endif
if
(
dev
->
flags
&
IFF_PROMISC
)
{
/* Promiscuous mode. */
...
...
@@ -2338,7 +2386,6 @@ bnx2_set_power_state(struct bnx2 *bp, pci_power_t state)
val
|=
BNX2_EMAC_MODE_PORT_MII
|
BNX2_EMAC_MODE_MPKT_RCVD
|
BNX2_EMAC_MODE_ACPI_RCVD
|
BNX2_EMAC_MODE_FORCE_LINK
|
BNX2_EMAC_MODE_MPKT
;
REG_WR
(
bp
,
BNX2_EMAC_MODE
,
val
);
...
...
@@ -2374,7 +2421,8 @@ bnx2_set_power_state(struct bnx2 *bp, pci_power_t state)
wol_msg
=
BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL
;
}
bnx2_fw_sync
(
bp
,
BNX2_DRV_MSG_DATA_WAIT3
|
wol_msg
);
if
(
!
(
bp
->
flags
&
NO_WOL_FLAG
))
bnx2_fw_sync
(
bp
,
BNX2_DRV_MSG_DATA_WAIT3
|
wol_msg
,
0
);
pmcsr
&=
~
PCI_PM_CTRL_STATE_MASK
;
if
((
CHIP_ID
(
bp
)
==
CHIP_ID_5706_A0
)
||
...
...
@@ -2708,9 +2756,16 @@ bnx2_init_nvram(struct bnx2 *bp)
if
(
j
==
entry_count
)
{
bp
->
flash_info
=
NULL
;
printk
(
KERN_ALERT
PFX
"Unknown flash/EEPROM type.
\n
"
);
r
c
=
-
ENODEV
;
r
eturn
-
ENODEV
;
}
val
=
REG_RD_IND
(
bp
,
bp
->
shmem_base
+
BNX2_SHARED_HW_CFG_CONFIG2
);
val
&=
BNX2_SHARED_HW_CFG2_NVM_SIZE_MASK
;
if
(
val
)
bp
->
flash_size
=
val
;
else
bp
->
flash_size
=
bp
->
flash_info
->
total_size
;
return
rc
;
}
...
...
@@ -3014,16 +3069,14 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
val
=
REG_RD
(
bp
,
BNX2_MISC_ENABLE_CLR_BITS
);
udelay
(
5
);
/* Wait for the firmware to tell us it is ok to issue a reset. */
bnx2_fw_sync
(
bp
,
BNX2_DRV_MSG_DATA_WAIT0
|
reset_code
,
1
);
/* Deposit a driver reset signature so the firmware knows that
* this is a soft reset. */
REG_WR_IND
(
bp
,
bp
->
shmem_base
+
BNX2_DRV_RESET_SIGNATURE
,
BNX2_DRV_RESET_SIGNATURE_MAGIC
);
bp
->
fw_timed_out
=
0
;
/* Wait for the firmware to tell us it is ok to issue a reset. */
bnx2_fw_sync
(
bp
,
BNX2_DRV_MSG_DATA_WAIT0
|
reset_code
);
/* Do a dummy read to force the chip to complete all current transaction
* before we issue a reset. */
val
=
REG_RD
(
bp
,
BNX2_MISC_ID
);
...
...
@@ -3062,10 +3115,10 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
return
-
ENODEV
;
}
bp
->
fw_timed_out
=
0
;
/* Wait for the firmware to finish its initialization. */
bnx2_fw_sync
(
bp
,
BNX2_DRV_MSG_DATA_WAIT1
|
reset_code
);
rc
=
bnx2_fw_sync
(
bp
,
BNX2_DRV_MSG_DATA_WAIT1
|
reset_code
,
0
);
if
(
rc
)
return
rc
;
if
(
CHIP_ID
(
bp
)
==
CHIP_ID_5706_A0
)
{
/* Adjust the voltage regular to two steps lower. The default
...
...
@@ -3083,6 +3136,7 @@ static int
bnx2_init_chip
(
struct
bnx2
*
bp
)
{
u32
val
;
int
rc
;
/* Make sure the interrupt is not active. */
REG_WR
(
bp
,
BNX2_PCICFG_INT_ACK_CMD
,
BNX2_PCICFG_INT_ACK_CMD_MASK_INT
);
...
...
@@ -3098,7 +3152,7 @@ bnx2_init_chip(struct bnx2 *bp)
val
|=
(
0x2
<<
20
)
|
(
1
<<
11
);
if
((
bp
->
flags
&
PCIX_FLAG
)
&&
(
bp
->
bus_speed_mhz
=
133
))
if
((
bp
->
flags
&
PCIX_FLAG
)
&&
(
bp
->
bus_speed_mhz
=
=
133
))
val
|=
(
1
<<
23
);
if
((
CHIP_NUM
(
bp
)
==
CHIP_NUM_5706
)
&&
...
...
@@ -3218,17 +3272,22 @@ bnx2_init_chip(struct bnx2 *bp)
REG_WR
(
bp
,
BNX2_HC_ATTN_BITS_ENABLE
,
STATUS_ATTN_BITS_LINK_STATE
);
if
(
REG_RD_IND
(
bp
,
bp
->
shmem_base
+
BNX2_PORT_FEATURE
)
&
BNX2_PORT_FEATURE_ASF_ENABLED
)
bp
->
flags
|=
ASF_ENABLE_FLAG
;
/* Initialize the receive filter. */
bnx2_set_rx_mode
(
bp
->
dev
);
bnx2_fw_sync
(
bp
,
BNX2_DRV_MSG_DATA_WAIT2
|
BNX2_DRV_MSG_CODE_RESET
);
rc
=
bnx2_fw_sync
(
bp
,
BNX2_DRV_MSG_DATA_WAIT2
|
BNX2_DRV_MSG_CODE_RESET
,
0
);
REG_WR
(
bp
,
BNX2_MISC_ENABLE_SET_BITS
,
0x5ffffff
);
REG_RD
(
bp
,
BNX2_MISC_ENABLE_SET_BITS
);
udelay
(
20
);
return
0
;
return
rc
;
}
...
...
@@ -3880,26 +3939,33 @@ bnx2_test_memory(struct bnx2 *bp)
return
ret
;
}
#define BNX2_MAC_LOOPBACK 0
#define BNX2_PHY_LOOPBACK 1
static
int
bnx2_
test_loopback
(
struct
bnx2
*
bp
)
bnx2_
run_loopback
(
struct
bnx2
*
bp
,
int
loopback_mode
)
{
unsigned
int
pkt_size
,
num_pkts
,
i
;
struct
sk_buff
*
skb
,
*
rx_skb
;
unsigned
char
*
packet
;
u16
rx_start_idx
,
rx_idx
,
send_idx
;
u32
send_bseq
,
val
;
u16
rx_start_idx
,
rx_idx
;
u32
val
;
dma_addr_t
map
;
struct
tx_bd
*
txbd
;
struct
sw_bd
*
rx_buf
;
struct
l2_fhdr
*
rx_hdr
;
int
ret
=
-
ENODEV
;
if
(
!
netif_running
(
bp
->
dev
))
return
-
ENODEV
;
bp
->
loopback
=
MAC_LOOPBACK
;
bnx2_reset_nic
(
bp
,
BNX2_DRV_MSG_CODE_DIAG
);
bnx2_set_mac_loopback
(
bp
);
if
(
loopback_mode
==
BNX2_MAC_LOOPBACK
)
{
bp
->
loopback
=
MAC_LOOPBACK
;
bnx2_set_mac_loopback
(
bp
);
}
else
if
(
loopback_mode
==
BNX2_PHY_LOOPBACK
)
{
bp
->
loopback
=
0
;
bnx2_set_phy_loopback
(
bp
);
}
else
return
-
EINVAL
;
pkt_size
=
1514
;
skb
=
dev_alloc_skb
(
pkt_size
);
...
...
@@ -3921,11 +3987,9 @@ bnx2_test_loopback(struct bnx2 *bp)
udelay
(
5
);
rx_start_idx
=
bp
->
status_blk
->
status_rx_quick_consumer_index0
;
send_idx
=
0
;
send_bseq
=
0
;
num_pkts
=
0
;
txbd
=
&
bp
->
tx_desc_ring
[
send_idx
];
txbd
=
&
bp
->
tx_desc_ring
[
TX_RING_IDX
(
bp
->
tx_prod
)
];
txbd
->
tx_bd_haddr_hi
=
(
u64
)
map
>>
32
;
txbd
->
tx_bd_haddr_lo
=
(
u64
)
map
&
0xffffffff
;
...
...
@@ -3933,13 +3997,11 @@ bnx2_test_loopback(struct bnx2 *bp)
txbd
->
tx_bd_vlan_tag_flags
=
TX_BD_FLAGS_START
|
TX_BD_FLAGS_END
;
num_pkts
++
;
send_idx
=
NEXT_TX_BD
(
send_idx
);
send_bseq
+=
pkt_size
;
REG_WR16
(
bp
,
MB_TX_CID_ADDR
+
BNX2_L2CTX_TX_HOST_BIDX
,
send_idx
);
REG_WR
(
bp
,
MB_TX_CID_ADDR
+
BNX2_L2CTX_TX_HOST_BSEQ
,
send_bseq
);
bp
->
tx_prod
=
NEXT_TX_BD
(
bp
->
tx_prod
);
bp
->
tx_prod_bseq
+=
pkt_size
;
REG_WR16
(
bp
,
MB_TX_CID_ADDR
+
BNX2_L2CTX_TX_HOST_BIDX
,
bp
->
tx_prod
);
REG_WR
(
bp
,
MB_TX_CID_ADDR
+
BNX2_L2CTX_TX_HOST_BSEQ
,
bp
->
tx_prod_bseq
);
udelay
(
100
);
...
...
@@ -3952,7 +4014,7 @@ bnx2_test_loopback(struct bnx2 *bp)
pci_unmap_single
(
bp
->
pdev
,
map
,
pkt_size
,
PCI_DMA_TODEVICE
);
dev_kfree_skb_irq
(
skb
);
if
(
bp
->
status_blk
->
status_tx_quick_consumer_index0
!=
send_idx
)
{
if
(
bp
->
status_blk
->
status_tx_quick_consumer_index0
!=
bp
->
tx_prod
)
{
goto
loopback_test_done
;
}
...
...
@@ -3971,7 +4033,7 @@ bnx2_test_loopback(struct bnx2 *bp)
pci_unmap_addr
(
rx_buf
,
mapping
),
bp
->
rx_buf_size
,
PCI_DMA_FROMDEVICE
);
if
(
rx_hdr
->
l2_fhdr_
error
s
&
if
(
rx_hdr
->
l2_fhdr_
statu
s
&
(
L2_FHDR_ERRORS_BAD_CRC
|
L2_FHDR_ERRORS_PHY_DECODE
|
L2_FHDR_ERRORS_ALIGNMENT
|
...
...
@@ -3998,6 +4060,30 @@ bnx2_test_loopback(struct bnx2 *bp)
return
ret
;
}
#define BNX2_MAC_LOOPBACK_FAILED 1
#define BNX2_PHY_LOOPBACK_FAILED 2
#define BNX2_LOOPBACK_FAILED (BNX2_MAC_LOOPBACK_FAILED | \
BNX2_PHY_LOOPBACK_FAILED)
static
int
bnx2_test_loopback
(
struct
bnx2
*
bp
)
{
int
rc
=
0
;
if
(
!
netif_running
(
bp
->
dev
))
return
BNX2_LOOPBACK_FAILED
;
bnx2_reset_nic
(
bp
,
BNX2_DRV_MSG_CODE_RESET
);
spin_lock_bh
(
&
bp
->
phy_lock
);
bnx2_init_phy
(
bp
);
spin_unlock_bh
(
&
bp
->
phy_lock
);
if
(
bnx2_run_loopback
(
bp
,
BNX2_MAC_LOOPBACK
))
rc
|=
BNX2_MAC_LOOPBACK_FAILED
;
if
(
bnx2_run_loopback
(
bp
,
BNX2_PHY_LOOPBACK
))
rc
|=
BNX2_PHY_LOOPBACK_FAILED
;
return
rc
;
}
#define NVRAM_SIZE 0x200
#define CRC32_RESIDUAL 0xdebb20e3
...
...
@@ -4167,7 +4253,7 @@ bnx2_timer(unsigned long data)
static
int
bnx2_open
(
struct
net_device
*
dev
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
int
rc
;
bnx2_set_power_state
(
bp
,
PCI_D0
);
...
...
@@ -4280,7 +4366,7 @@ bnx2_reset_task(void *data)
static
void
bnx2_tx_timeout
(
struct
net_device
*
dev
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
/* This allows the netif to be shutdown gracefully before resetting */
schedule_work
(
&
bp
->
reset_task
);
...
...
@@ -4291,7 +4377,7 @@ bnx2_tx_timeout(struct net_device *dev)
static
void
bnx2_vlan_rx_register
(
struct
net_device
*
dev
,
struct
vlan_group
*
vlgrp
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
bnx2_netif_stop
(
bp
);
...
...
@@ -4305,7 +4391,7 @@ bnx2_vlan_rx_register(struct net_device *dev, struct vlan_group *vlgrp)
static
void
bnx2_vlan_rx_kill_vid
(
struct
net_device
*
dev
,
uint16_t
vid
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
bnx2_netif_stop
(
bp
);
...
...
@@ -4326,7 +4412,7 @@ bnx2_vlan_rx_kill_vid(struct net_device *dev, uint16_t vid)
static
int
bnx2_start_xmit
(
struct
sk_buff
*
skb
,
struct
net_device
*
dev
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
dma_addr_t
mapping
;
struct
tx_bd
*
txbd
;
struct
sw_bd
*
tx_buf
;
...
...
@@ -4455,7 +4541,7 @@ bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev)
static
int
bnx2_close
(
struct
net_device
*
dev
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
u32
reset_code
;
/* Calling flush_scheduled_work() may deadlock because
...
...
@@ -4467,7 +4553,9 @@ bnx2_close(struct net_device *dev)
bnx2_netif_stop
(
bp
);
del_timer_sync
(
&
bp
->
timer
);
if
(
bp
->
wol
)
if
(
bp
->
flags
&
NO_WOL_FLAG
)
reset_code
=
BNX2_DRV_MSG_CODE_UNLOAD
;
else
if
(
bp
->
wol
)
reset_code
=
BNX2_DRV_MSG_CODE_SUSPEND_WOL
;
else
reset_code
=
BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL
;
...
...
@@ -4501,7 +4589,7 @@ bnx2_close(struct net_device *dev)
static
struct
net_device_stats
*
bnx2_get_stats
(
struct
net_device
*
dev
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
struct
statistics_block
*
stats_blk
=
bp
->
stats_blk
;
struct
net_device_stats
*
net_stats
=
&
bp
->
net_stats
;
...
...
@@ -4575,7 +4663,7 @@ bnx2_get_stats(struct net_device *dev)
static
int
bnx2_get_settings
(
struct
net_device
*
dev
,
struct
ethtool_cmd
*
cmd
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
cmd
->
supported
=
SUPPORTED_Autoneg
;
if
(
bp
->
phy_flags
&
PHY_SERDES_FLAG
)
{
...
...
@@ -4622,7 +4710,7 @@ bnx2_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
static
int
bnx2_set_settings
(
struct
net_device
*
dev
,
struct
ethtool_cmd
*
cmd
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
u8
autoneg
=
bp
->
autoneg
;
u8
req_duplex
=
bp
->
req_duplex
;
u16
req_line_speed
=
bp
->
req_line_speed
;
...
...
@@ -4694,7 +4782,7 @@ bnx2_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
static
void
bnx2_get_drvinfo
(
struct
net_device
*
dev
,
struct
ethtool_drvinfo
*
info
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
strcpy
(
info
->
driver
,
DRV_MODULE_NAME
);
strcpy
(
info
->
version
,
DRV_MODULE_VERSION
);
...
...
@@ -4702,15 +4790,14 @@ bnx2_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
info
->
fw_version
[
0
]
=
((
bp
->
fw_ver
&
0xff000000
)
>>
24
)
+
'0'
;
info
->
fw_version
[
2
]
=
((
bp
->
fw_ver
&
0xff0000
)
>>
16
)
+
'0'
;
info
->
fw_version
[
4
]
=
((
bp
->
fw_ver
&
0xff00
)
>>
8
)
+
'0'
;
info
->
fw_version
[
6
]
=
(
bp
->
fw_ver
&
0xff
)
+
'0'
;
info
->
fw_version
[
1
]
=
info
->
fw_version
[
3
]
=
info
->
fw_version
[
5
]
=
'.'
;
info
->
fw_version
[
7
]
=
0
;
info
->
fw_version
[
1
]
=
info
->
fw_version
[
3
]
=
'.'
;
info
->
fw_version
[
5
]
=
0
;
}
static
void
bnx2_get_wol
(
struct
net_device
*
dev
,
struct
ethtool_wolinfo
*
wol
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
if
(
bp
->
flags
&
NO_WOL_FLAG
)
{
wol
->
supported
=
0
;
...
...
@@ -4729,7 +4816,7 @@ bnx2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
static
int
bnx2_set_wol
(
struct
net_device
*
dev
,
struct
ethtool_wolinfo
*
wol
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
if
(
wol
->
wolopts
&
~
WAKE_MAGIC
)
return
-
EINVAL
;
...
...
@@ -4749,7 +4836,7 @@ bnx2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
static
int
bnx2_nway_reset
(
struct
net_device
*
dev
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
u32
bmcr
;
if
(
!
(
bp
->
autoneg
&
AUTONEG_SPEED
))
{
...
...
@@ -4785,19 +4872,19 @@ bnx2_nway_reset(struct net_device *dev)
static
int
bnx2_get_eeprom_len
(
struct
net_device
*
dev
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
if
(
bp
->
flash_info
==
0
)
if
(
bp
->
flash_info
==
NULL
)
return
0
;
return
(
int
)
bp
->
flash_
info
->
total_
size
;
return
(
int
)
bp
->
flash_size
;
}
static
int
bnx2_get_eeprom
(
struct
net_device
*
dev
,
struct
ethtool_eeprom
*
eeprom
,
u8
*
eebuf
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
int
rc
;
/* parameters already validated in ethtool_get_eeprom */
...
...
@@ -4811,7 +4898,7 @@ static int
bnx2_set_eeprom
(
struct
net_device
*
dev
,
struct
ethtool_eeprom
*
eeprom
,
u8
*
eebuf
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
int
rc
;
/* parameters already validated in ethtool_set_eeprom */
...
...
@@ -4824,7 +4911,7 @@ bnx2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
static
int
bnx2_get_coalesce
(
struct
net_device
*
dev
,
struct
ethtool_coalesce
*
coal
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
memset
(
coal
,
0
,
sizeof
(
struct
ethtool_coalesce
));
...
...
@@ -4846,7 +4933,7 @@ bnx2_get_coalesce(struct net_device *dev, struct ethtool_coalesce *coal)
static
int
bnx2_set_coalesce
(
struct
net_device
*
dev
,
struct
ethtool_coalesce
*
coal
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
bp
->
rx_ticks
=
(
u16
)
coal
->
rx_coalesce_usecs
;
if
(
bp
->
rx_ticks
>
0x3ff
)
bp
->
rx_ticks
=
0x3ff
;
...
...
@@ -4890,7 +4977,7 @@ bnx2_set_coalesce(struct net_device *dev, struct ethtool_coalesce *coal)
static
void
bnx2_get_ringparam
(
struct
net_device
*
dev
,
struct
ethtool_ringparam
*
ering
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
ering
->
rx_max_pending
=
MAX_RX_DESC_CNT
;
ering
->
rx_mini_max_pending
=
0
;
...
...
@@ -4907,7 +4994,7 @@ bnx2_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)
static
int
bnx2_set_ringparam
(
struct
net_device
*
dev
,
struct
ethtool_ringparam
*
ering
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
if
((
ering
->
rx_pending
>
MAX_RX_DESC_CNT
)
||
(
ering
->
tx_pending
>
MAX_TX_DESC_CNT
)
||
...
...
@@ -4930,7 +5017,7 @@ bnx2_set_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)
static
void
bnx2_get_pauseparam
(
struct
net_device
*
dev
,
struct
ethtool_pauseparam
*
epause
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
epause
->
autoneg
=
((
bp
->
autoneg
&
AUTONEG_FLOW_CTRL
)
!=
0
);
epause
->
rx_pause
=
((
bp
->
flow_ctrl
&
FLOW_CTRL_RX
)
!=
0
);
...
...
@@ -4940,7 +5027,7 @@ bnx2_get_pauseparam(struct net_device *dev, struct ethtool_pauseparam *epause)
static
int
bnx2_set_pauseparam
(
struct
net_device
*
dev
,
struct
ethtool_pauseparam
*
epause
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
bp
->
req_flow_ctrl
=
0
;
if
(
epause
->
rx_pause
)
...
...
@@ -4967,7 +5054,7 @@ bnx2_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam *epause)
static
u32
bnx2_get_rx_csum
(
struct
net_device
*
dev
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
return
bp
->
rx_csum
;
}
...
...
@@ -4975,7 +5062,7 @@ bnx2_get_rx_csum(struct net_device *dev)
static
int
bnx2_set_rx_csum
(
struct
net_device
*
dev
,
u32
data
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
bp
->
rx_csum
=
data
;
return
0
;
...
...
@@ -5124,7 +5211,7 @@ bnx2_self_test_count(struct net_device *dev)
static
void
bnx2_self_test
(
struct
net_device
*
dev
,
struct
ethtool_test
*
etest
,
u64
*
buf
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
memset
(
buf
,
0
,
sizeof
(
u64
)
*
BNX2_NUM_TESTS
);
if
(
etest
->
flags
&
ETH_TEST_FL_OFFLINE
)
{
...
...
@@ -5140,10 +5227,8 @@ bnx2_self_test(struct net_device *dev, struct ethtool_test *etest, u64 *buf)
buf
[
1
]
=
1
;
etest
->
flags
|=
ETH_TEST_FL_FAILED
;
}
if
(
bnx2_test_loopback
(
bp
)
!=
0
)
{
buf
[
2
]
=
1
;
if
((
buf
[
2
]
=
bnx2_test_loopback
(
bp
))
!=
0
)
etest
->
flags
|=
ETH_TEST_FL_FAILED
;
}
if
(
!
netif_running
(
bp
->
dev
))
{
bnx2_reset_chip
(
bp
,
BNX2_DRV_MSG_CODE_RESET
);
...
...
@@ -5200,7 +5285,7 @@ static void
bnx2_get_ethtool_stats
(
struct
net_device
*
dev
,
struct
ethtool_stats
*
stats
,
u64
*
buf
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
int
i
;
u32
*
hw_stats
=
(
u32
*
)
bp
->
stats_blk
;
u8
*
stats_len_arr
=
NULL
;
...
...
@@ -5240,7 +5325,7 @@ bnx2_get_ethtool_stats(struct net_device *dev,
static
int
bnx2_phys_id
(
struct
net_device
*
dev
,
u32
data
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
int
i
;
u32
save
;
...
...
@@ -5312,7 +5397,7 @@ static int
bnx2_ioctl
(
struct
net_device
*
dev
,
struct
ifreq
*
ifr
,
int
cmd
)
{
struct
mii_ioctl_data
*
data
=
if_mii
(
ifr
);
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
int
err
;
switch
(
cmd
)
{
...
...
@@ -5354,7 +5439,7 @@ static int
bnx2_change_mac_addr
(
struct
net_device
*
dev
,
void
*
p
)
{
struct
sockaddr
*
addr
=
p
;
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
if
(
!
is_valid_ether_addr
(
addr
->
sa_data
))
return
-
EINVAL
;
...
...
@@ -5370,7 +5455,7 @@ bnx2_change_mac_addr(struct net_device *dev, void *p)
static
int
bnx2_change_mtu
(
struct
net_device
*
dev
,
int
new_mtu
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
if
(((
new_mtu
+
ETH_HLEN
)
>
MAX_ETHERNET_JUMBO_PACKET_SIZE
)
||
((
new_mtu
+
ETH_HLEN
)
<
MIN_ETHERNET_PACKET_SIZE
))
...
...
@@ -5391,7 +5476,7 @@ bnx2_change_mtu(struct net_device *dev, int new_mtu)
static
void
poll_bnx2
(
struct
net_device
*
dev
)
{
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
disable_irq
(
bp
->
pdev
->
irq
);
bnx2_interrupt
(
bp
->
pdev
->
irq
,
dev
,
NULL
);
...
...
@@ -5409,7 +5494,7 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
SET_MODULE_OWNER
(
dev
);
SET_NETDEV_DEV
(
dev
,
&
pdev
->
dev
);
bp
=
dev
->
priv
;
bp
=
netdev_priv
(
dev
)
;
bp
->
flags
=
0
;
bp
->
phy_flags
=
0
;
...
...
@@ -5629,6 +5714,9 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
}
}
if
(
CHIP_NUM
(
bp
)
==
CHIP_NUM_5708
)
bp
->
flags
|=
NO_WOL_FLAG
;
if
(
CHIP_ID
(
bp
)
==
CHIP_ID_5706_A0
)
{
bp
->
tx_quick_cons_trip_int
=
bp
->
tx_quick_cons_trip
;
...
...
@@ -5725,7 +5813,7 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
dev
->
ethtool_ops
=
&
bnx2_ethtool_ops
;
dev
->
weight
=
64
;
bp
=
dev
->
priv
;
bp
=
netdev_priv
(
dev
)
;
#if defined(HAVE_POLL_CONTROLLER) || defined(CONFIG_NET_POLL_CONTROLLER)
dev
->
poll_controller
=
poll_bnx2
;
...
...
@@ -5784,7 +5872,7 @@ static void __devexit
bnx2_remove_one
(
struct
pci_dev
*
pdev
)
{
struct
net_device
*
dev
=
pci_get_drvdata
(
pdev
);
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
flush_scheduled_work
();
...
...
@@ -5803,7 +5891,7 @@ static int
bnx2_suspend
(
struct
pci_dev
*
pdev
,
pm_message_t
state
)
{
struct
net_device
*
dev
=
pci_get_drvdata
(
pdev
);
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
u32
reset_code
;
if
(
!
netif_running
(
dev
))
...
...
@@ -5812,7 +5900,9 @@ bnx2_suspend(struct pci_dev *pdev, pm_message_t state)
bnx2_netif_stop
(
bp
);
netif_device_detach
(
dev
);
del_timer_sync
(
&
bp
->
timer
);
if
(
bp
->
wol
)
if
(
bp
->
flags
&
NO_WOL_FLAG
)
reset_code
=
BNX2_DRV_MSG_CODE_UNLOAD
;
else
if
(
bp
->
wol
)
reset_code
=
BNX2_DRV_MSG_CODE_SUSPEND_WOL
;
else
reset_code
=
BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL
;
...
...
@@ -5826,7 +5916,7 @@ static int
bnx2_resume
(
struct
pci_dev
*
pdev
)
{
struct
net_device
*
dev
=
pci_get_drvdata
(
pdev
);
struct
bnx2
*
bp
=
dev
->
priv
;
struct
bnx2
*
bp
=
netdev_priv
(
dev
)
;
if
(
!
netif_running
(
dev
))
return
0
;
...
...
drivers/net/bnx2.h
View file @
078a9b03
/* bnx2.h: Broadcom NX2 network driver.
*
* Copyright (c) 2004, 2005 Broadcom Corporation
* Copyright (c) 2004, 2005
, 2006
Broadcom Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -277,19 +277,7 @@ struct statistics_block {
* l2_fhdr definition
*/
struct
l2_fhdr
{
#if defined(__BIG_ENDIAN)
u16
l2_fhdr_errors
;
u16
l2_fhdr_status
;
#elif defined(__LITTLE_ENDIAN)
u16
l2_fhdr_status
;
u16
l2_fhdr_errors
;
#endif
#define L2_FHDR_ERRORS_BAD_CRC (1<<1)
#define L2_FHDR_ERRORS_PHY_DECODE (1<<2)
#define L2_FHDR_ERRORS_ALIGNMENT (1<<3)
#define L2_FHDR_ERRORS_TOO_SHORT (1<<4)
#define L2_FHDR_ERRORS_GIANT_FRAME (1<<5)
u32
l2_fhdr_status
;
#define L2_FHDR_STATUS_RULE_CLASS (0x7<<0)
#define L2_FHDR_STATUS_RULE_P2 (1<<3)
#define L2_FHDR_STATUS_RULE_P3 (1<<4)
...
...
@@ -301,6 +289,14 @@ struct l2_fhdr {
#define L2_FHDR_STATUS_TCP_SEGMENT (1<<14)
#define L2_FHDR_STATUS_UDP_DATAGRAM (1<<15)
#define L2_FHDR_ERRORS_BAD_CRC (1<<17)
#define L2_FHDR_ERRORS_PHY_DECODE (1<<18)
#define L2_FHDR_ERRORS_ALIGNMENT (1<<19)
#define L2_FHDR_ERRORS_TOO_SHORT (1<<20)
#define L2_FHDR_ERRORS_GIANT_FRAME (1<<21)
#define L2_FHDR_ERRORS_TCP_XSUM (1<<28)
#define L2_FHDR_ERRORS_UDP_XSUM (1<<31)
u32
l2_fhdr_hash
;
#if defined(__BIG_ENDIAN)
u16
l2_fhdr_pkt_len
;
...
...
@@ -3956,6 +3952,7 @@ struct bnx2 {
#define NO_WOL_FLAG 8
#define USING_DAC_FLAG 0x10
#define USING_MSI_FLAG 0x20
#define ASF_ENABLE_FLAG 0x40
u32
phy_flags
;
#define PHY_SERDES_FLAG 1
...
...
@@ -3986,6 +3983,7 @@ struct bnx2 {
#define CHIP_ID_5706_A2 0x57060020
#define CHIP_ID_5708_A0 0x57080000
#define CHIP_ID_5708_B0 0x57081000
#define CHIP_ID_5708_B1 0x57081010
#define CHIP_BOND_ID(bp) (((bp)->chip_id) & 0xf)
...
...
@@ -3998,7 +3996,7 @@ struct bnx2 {
u16
bus_speed_mhz
;
u8
wol
;
u8
fw_timed_out
;
u8
pad
;
u16
fw_wr_seq
;
u16
fw_drv_pulse_wr_seq
;
...
...
@@ -4074,6 +4072,7 @@ struct bnx2 {
struct
net_device_stats
net_stats
;
struct
flash_spec
*
flash_info
;
u32
flash_size
;
};
static
u32
bnx2_reg_rd_ind
(
struct
bnx2
*
bp
,
u32
offset
);
...
...
@@ -4172,7 +4171,7 @@ struct fw_info {
* the firmware has timed out, the driver will assume there is no firmware
* running and there won't be any firmware-driver synchronization during a
* driver reset. */
#define FW_ACK_TIME_OUT_MS
5
0
#define FW_ACK_TIME_OUT_MS
10
0
#define BNX2_DRV_RESET_SIGNATURE 0x00000000
...
...
@@ -4275,6 +4274,9 @@ struct fw_info {
#define BNX2_SHARED_HW_CFG_LED_MODE_GPHY1 0x100
#define BNX2_SHARED_HW_CFG_LED_MODE_GPHY2 0x200
#define BNX2_SHARED_HW_CFG_CONFIG2 0x00000040
#define BNX2_SHARED_HW_CFG2_NVM_SIZE_MASK 0x00fff000
#define BNX2_DEV_INFO_BC_REV 0x0000004c
#define BNX2_PORT_HW_CFG_MAC_UPPER 0x00000050
...
...
drivers/net/bnx2_fw.h
View file @
078a9b03
/* bnx2_fw.h: Broadcom NX2 network driver.
*
* Copyright (c) 2004, 2005 Broadcom Corporation
* Copyright (c) 2004, 2005
, 2006
Broadcom Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
...
...
@@ -978,20 +978,20 @@ static u32 bnx2_COM_b06FwSbss[(0x1c/4) + 1] = { 0x0 };
static
int
bnx2_RXP_b06FwReleaseMajor
=
0x1
;
static
int
bnx2_RXP_b06FwReleaseMinor
=
0x0
;
static
int
bnx2_RXP_b06FwReleaseFix
=
0x0
;
static
u32
bnx2_RXP_b06FwStartAddr
=
0x080031
0
4
;
static
u32
bnx2_RXP_b06FwStartAddr
=
0x080031
8
4
;
static
u32
bnx2_RXP_b06FwTextAddr
=
0x08000000
;
static
int
bnx2_RXP_b06FwTextLen
=
0x5
62
c
;
static
u32
bnx2_RXP_b06FwDataAddr
=
0x08005
66
0
;
static
int
bnx2_RXP_b06FwTextLen
=
0x5
88
c
;
static
u32
bnx2_RXP_b06FwDataAddr
=
0x08005
8e
0
;
static
int
bnx2_RXP_b06FwDataLen
=
0x0
;
static
u32
bnx2_RXP_b06FwRodataAddr
=
0x0
000000
0
;
static
int
bnx2_RXP_b06FwRodataLen
=
0x
0
;
static
u32
bnx2_RXP_b06FwBssAddr
=
0x08005
68
0
;
static
int
bnx2_RXP_b06FwBssLen
=
0x13
9
4
;
static
u32
bnx2_RXP_b06FwSbssAddr
=
0x08005
66
0
;
static
int
bnx2_RXP_b06FwSbssLen
=
0x1
8
;
static
u32
bnx2_RXP_b06FwText
[(
0x5
62
c
/
4
)
+
1
]
=
{
0x0a000c
41
,
0x00000000
,
0x00000000
,
0x0000000d
,
0x72787020
,
0x322e35
2e
,
0x3
8000000
,
0x020508
03
,
0x00000000
,
0x0000000d
,
0x00000000
,
0x00000000
,
static
u32
bnx2_RXP_b06FwRodataAddr
=
0x0
800589
0
;
static
int
bnx2_RXP_b06FwRodataLen
=
0x
28
;
static
u32
bnx2_RXP_b06FwBssAddr
=
0x08005
90
0
;
static
int
bnx2_RXP_b06FwBssLen
=
0x13
a
4
;
static
u32
bnx2_RXP_b06FwSbssAddr
=
0x08005
8e
0
;
static
int
bnx2_RXP_b06FwSbssLen
=
0x1
c
;
static
u32
bnx2_RXP_b06FwText
[(
0x5
88
c
/
4
)
+
1
]
=
{
0x0a000c
61
,
0x00000000
,
0x00000000
,
0x0000000d
,
0x72787020
,
0x322e36
2e
,
0x3
1000000
,
0x020601
03
,
0x00000000
,
0x0000000d
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
...
...
@@ -1513,408 +1513,435 @@ static u32 bnx2_RXP_b06FwText[(0x562c/4) + 1] = {
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x10000003
,
0x00000000
,
0x0000000d
,
0x0000000d
,
0x3c020800
,
0x24425660
,
0x3c030800
,
0x24636a14
,
0xac400000
,
0x0043202b
,
0x1480fffd
,
0x24420004
,
0x3c1d0800
,
0x37bd7ffc
,
0x03a0f021
,
0x3c100800
,
0x26103104
,
0x3c1c0800
,
0x279c5660
,
0x0e001035
,
0x00000000
,
0x0000000d
,
0x3c080800
,
0x8d023100
,
0x2c420080
,
0x50400001
,
0xad003100
,
0x8d073100
,
0x3c040800
,
0x24840100
,
0x8f460100
,
0x00071840
,
0x00671821
,
0x00031940
,
0x00641021
,
0xac460000
,
0x8f450104
,
0x00831021
,
0xac450004
,
0x8f460108
,
0xac460008
,
0x8f45010c
,
0xac45000c
,
0x8f460114
,
0xac460010
,
0x8f450118
,
0xac450014
,
0x8f460124
,
0xac460018
,
0x8f450128
,
0xac45001c
,
0x8f464010
,
0xac460020
,
0x8f454014
,
0xac450024
,
0x8f464018
,
0xac460028
,
0x8f45401c
,
0xac45002c
,
0x8f464020
,
0xac460030
,
0x8f454024
,
0xac450034
,
0x8f464028
,
0xac460038
,
0x8f45402c
,
0xac45003c
,
0x8f464030
,
0xac460040
,
0x8f454034
,
0xac450044
,
0x8f464038
,
0xac460048
,
0x8f45403c
,
0xac45004c
,
0x8f464040
,
0xac460050
,
0x8f454044
,
0xac450054
,
0x8f464048
,
0xac460058
,
0x8f45404c
,
0x24e70001
,
0x00402021
,
0xad073100
,
0x03e00008
,
0xac85005c
,
0x8f820004
,
0x9743010c
,
0x00804821
,
0x00403021
,
0x30421000
,
0x10400010
,
0x306affff
,
0x30c20020
,
0x1440000e
,
0x24070005
,
0x3c021000
,
0x00c21024
,
0x10400009
,
0x3c030dff
,
0x3463ffff
,
0x3c020e00
,
0x00c21024
,
0x0062182b
,
0x50600004
,
0x24070001
,
0x0a000cb1
,
0x3c020800
,
0x24070001
,
0x3c020800
,
0x8c430034
,
0x1460001d
,
0x00405821
,
0x8f820010
,
0x30424000
,
0x1440001a
,
0x3c020001
,
0x3c021f01
,
0x00c24024
,
0x3c031000
,
0x15030015
,
0x3c020001
,
0x31420200
,
0x54400012
,
0x3c020001
,
0x9744010e
,
0x24020003
,
0xa342018b
,
0x97850012
,
0x24020002
,
0x34e30002
,
0xaf400180
,
0xa742018c
,
0xa7430188
,
0x24840004
,
0x30a5bfff
,
0xa744018e
,
0xa74501a6
,
0xaf4801b8
,
0x03e00008
,
0x00001021
,
0x3c020001
,
0x00c21024
,
0x10400039
,
0x00000000
,
0x9742010e
,
0x3c038000
,
0x3046ffff
,
0x8f4201b8
,
0x00431024
,
0x1440fffd
,
0x24020003
,
0xa342018b
,
0x97840006
,
0x8f85000c
,
0x24020080
,
0x24030002
,
0xaf420180
,
0xa743018c
,
0xa746018e
,
0x10a00005
,
0xa7440190
,
0x9743011c
,
0x9742011e
,
0x0a000cec
,
0x00021400
,
0x9743011e
,
0x9742011c
,
0x00021400
,
0x00621825
,
0xaf4301a8
,
0x8f840010
,
0x24020003
,
0x30838000
,
0x1060000d
,
0xa7420188
,
0x93420116
,
0x304200fc
,
0x005a1021
,
0x24424004
,
0x8c430000
,
0x3063ffff
,
0x14600005
,
0x00000000
,
0x3c02ffff
,
0x34427fff
,
0x00821024
,
0xaf820010
,
0x97820012
,
0x9743010c
,
0x8f440104
,
0x3042bfff
,
0x00031c00
,
0x3084ffff
,
0x00641825
,
0xa74201a6
,
0xaf4301ac
,
0x3c021000
,
0xaf4201b8
,
0x03e00008
,
0x00001021
,
0x8f820010
,
0x30434000
,
0x10600016
,
0x00404021
,
0x3c020f00
,
0x00c21024
,
0x14400012
,
0x00000000
,
0x93420116
,
0x34424000
,
0x03421821
,
0x94650002
,
0x2ca21389
,
0x1040000b
,
0x3c020800
,
0x24425680
,
0x00051942
,
0x00031880
,
0x00621821
,
0x30a5001f
,
0x8c640000
,
0x24020001
,
0x00a21004
,
0x00822024
,
0x01244825
,
0x11200039
,
0x3c021000
,
0x9742010e
,
0x34e70002
,
0x3c038000
,
0x24420004
,
0x3046ffff
,
0x8f4201b8
,
0x00431024
,
0x1440fffd
,
0x24020003
,
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0x0a001332
,
0xa3a4001a
,
0x97a20020
,
0x24030012
,
0xa3a30023
,
0x93a3001a
,
0xafa50028
,
0xa3a70022
,
0xafaa0024
,
0x3042fffe
,
0x3442005c
,
0x34630002
,
0xa7a20020
,
0xa3a3001a
,
0x31820001
,
0x10400030
,
0x2402000c
,
0x10e20013
,
0x28e2000d
,
0x10400005
,
0x2402000a
,
0x10e20008
,
0x97a20020
,
0x0a001365
,
0x31820009
,
0x2402000e
,
0x10e2001b
,
0x31820009
,
0x0a001366
,
0x0002102b
,
0x93a4001a
,
0x24030008
,
0xafa50028
,
0xa3a70022
,
0xa3a30023
,
0x0a001361
,
0x34420013
,
0x97a30020
,
0x30620004
,
0x14400005
,
0x93a2001a
,
0x3463001b
,
0xa7a30020
,
0x0a001354
,
0x24030016
,
0x3463001b
,
0xa7a30020
,
0x24030010
,
0xafa50028
,
0xa3a70022
,
0xa3a30023
,
0x34420002
,
0x0a001364
,
0xa3a2001a
,
0x97a20020
,
0x93a4001a
,
0x24030010
,
0xafa50028
,
0xa3a70022
,
0xa3a30023
,
0x3442001b
,
0x34840002
,
0xa7a20020
,
0xa3a4001a
,
0x31820009
,
0x0002102b
,
0x00021023
,
0x30420007
,
0x10c00017
,
0x34440003
,
0x8f820014
,
0x24030800
,
0x27450180
,
0x24420001
,
0xaf820014
,
0x24020004
,
0xaf4301b8
,
0xa4a40008
,
0xa0a2000b
,
0x93440120
,
0x3c031000
,
0xa4a6000e
,
0xacaa0024
,
0xaca80028
,
0x008d2021
,
0xa4a4000c
,
0xaf4301b8
,
0x97a20020
,
0x00003021
,
0x3042ffbf
,
0x0a001381
,
0xa7a20020
,
0x24060001
,
0x97a20020
,
0x10400020
,
0x27450180
,
0x3c038000
,
0x8f4201b8
,
0x00431024
,
0x1440fffd
,
0x00000000
,
0x8f420128
,
0xaca20000
,
0x8fa30028
,
0x240240c1
,
0xa4a20008
,
0xaca30018
,
0x93a4001a
,
0x24020002
,
0xa0a2000b
,
0xa0a4000a
,
0x97a20020
,
0xa4a20010
,
0x93a30022
,
0xa0a30012
,
0x93a20023
,
0xa0a20013
,
0x8fa30024
,
0xaca30014
,
0x8fa20034
,
0xaca20024
,
0x8fa30038
,
0xaca30028
,
0x8fa2003c
,
0x3c031000
,
0xaca2002c
,
0xaf4301b8
,
0x00c01021
,
0x8fbf0048
,
0x03e00008
,
0x27bd0050
,
0x8f470140
,
0x8f460148
,
0x3c028000
,
0x00c24024
,
0x00062c02
,
0x30a300ff
,
0x24020019
,
0x106200e7
,
0x27440180
,
0x2862001a
,
0x1040001f
,
0x24020008
,
0x106200be
,
0x28620009
,
0x1040000d
,
0x24020001
,
0x10620046
,
0x28620002
,
0x50400005
,
0x24020006
,
0x1060002e
,
0x00a01821
,
0x0a0014c4
,
0x00000000
,
0x1062005b
,
0x00a01821
,
0x0a0014c4
,
0x00000000
,
0x2402000b
,
0x10620084
,
0x2862000c
,
0x10400005
,
0x24020009
,
0x106200bc
,
0x00061c02
,
0x0a0014c4
,
0x00000000
,
0x2402000e
,
0x106200b7
,
0x00061c02
,
0x0a0014c4
,
0x00000000
,
0x28620021
,
0x10400009
,
0x2862001f
,
0x104000c1
,
0x2402001b
,
0x106200bf
,
0x2402001c
,
0x1062009a
,
0x00061c02
,
0x0a0014c4
,
0x00000000
,
0x240200c2
,
0x106200ca
,
0x286200c3
,
0x10400005
,
0x24020080
,
0x1062005a
,
0x00a01821
,
0x0a0014c4
,
0x00000000
,
0x240200c9
,
0x106200cd
,
0x30c5ffff
,
0x0a0014c4
,
0x00000000
,
0x3c058000
,
0x8f4201b8
,
0x00451024
,
0x1440fffd
,
0x24020001
,
0xa4830008
,
0x24030002
,
0xac870000
,
0xac800004
,
0xa082000a
,
0xa083000b
,
0xa4860010
,
0x8f430144
,
0x3c021000
,
0xac800028
,
0xac830024
,
0x3c036000
,
0xaf4201b8
,
0x03e00008
,
0xac600808
,
0x11000009
,
0x00a01821
,
0x3c020800
,
0x24030002
,
0xa0436a08
,
0x24426a08
,
0xac470008
,
0x8f430144
,
0x03e00008
,
0xac430004
,
0x3c058000
,
0x8f4201b8
,
0x00451024
,
0x1440fffd
,
0x24020002
,
0xac800000
,
0xac870004
,
0xa4830008
,
0xa082000a
,
0xa082000b
,
0xa4860010
,
0xac800024
,
0x8f420144
,
0x3c031000
,
0xac820028
,
0x3c026000
,
0xaf4301b8
,
0x03e00008
,
0xac400808
,
0x3c080800
,
0x3c058000
,
0x8f4201b8
,
0x00451024
,
0x1440fffd
,
0x00000000
,
0xac870000
,
0x91026a08
,
0x00002821
,
0x10400002
,
0x25076a08
,
0x8ce50008
,
0xac850004
,
0xa4830008
,
0x91036a08
,
0x24020002
,
0xa082000b
,
0xa4860010
,
0x34630001
,
0xa083000a
,
0x8f420144
,
0xac820024
,
0x91036a08
,
0x10600002
,
0x00001021
,
0x8ce20004
,
0xac820028
,
0x3c021000
,
0xaf4201b8
,
0x3c026000
,
0xa1006a08
,
0x03e00008
,
0xac400808
,
0x3c058000
,
0x8f4201b8
,
0x00451024
,
0x1440fffd
,
0x24020002
,
0xa082000b
,
0xa4830008
,
0xa4860010
,
0x8f420144
,
0x3c031000
,
0xa4820012
,
0x03e00008
,
0xaf4301b8
,
0x30c2ffff
,
0x14400028
,
0x00061c02
,
0x93620005
,
0x30420004
,
0x14400020
,
0x3c029000
,
0x34420001
,
0x00e21025
,
0xaf420020
,
0x3c038000
,
0x8f420020
,
0x00431024
,
0x1440fffd
,
0x00000000
,
0x93620005
,
0x3c038000
,
0x34630001
,
0x00e31825
,
0x34420004
,
0xa3620005
,
0xaf430020
,
0x93620005
,
0x30420004
,
0x14400003
,
0x3c038000
,
0x0000000d
,
0x3c038000
,
0x8f4201b8
,
0x00431024
,
0x1440fffd
,
0x24020005
,
0x3c031000
,
0xac870000
,
0xa082000b
,
0xaf4301b8
,
0x0a001473
,
0x00061c02
,
0x0000000d
,
0x03e00008
,
0x00000000
,
0x00061c02
,
0x3c058000
,
0x8f4201b8
,
0x00451024
,
0x1440fffd
,
0x24020001
,
0xa4830008
,
0x24030002
,
0xac870000
,
0xac800004
,
0xa082000a
,
0xa083000b
,
0xa4860010
,
0x8f430144
,
0x3c021000
,
0xac800028
,
0xac830024
,
0x03e00008
,
0xaf4201b8
,
0x3c058000
,
0x8f4201b8
,
0x00451024
,
0x1440fffd
,
0x24020002
,
0xac800000
,
0xac870004
,
0xa4830008
,
0xa082000a
,
0xa082000b
,
0xa4860010
,
0xac800024
,
0x8f420144
,
0x3c031000
,
0xac820028
,
0x03e00008
,
0xaf4301b8
,
0x00061c02
,
0x3c058000
,
0x8f4201b8
,
0x00451024
,
0x1440fffd
,
0x24020001
,
0xa4830008
,
0x24030002
,
0xa082000a
,
0x3c021000
,
0xac870000
,
0xac800004
,
0xa083000b
,
0xa4860010
,
0xac800024
,
0xac800028
,
0x03e00008
,
0xaf4201b8
,
0x00a01821
,
0x3c058000
,
0x8f4201b8
,
0x00451024
,
0x1440fffd
,
0x24020002
,
0xac870000
,
0xac800004
,
0xa4830008
,
0xa080000a
,
0x0a00147e
,
0xa082000b
,
0x8f440144
,
0x3c038000
,
0x8f4201b8
,
0x00431024
,
0x1440fffd
,
0x24020002
,
0x240340c9
,
0xaf470180
,
0xa342018b
,
0x3c021000
,
0xa7430188
,
0xaf4401a4
,
0xaf4501a8
,
0xaf4001ac
,
0x03e00008
,
0xaf4201b8
,
0x0000000d
,
0x03e00008
,
0x00000000
,
0x03e00008
,
0x00000000
,
0x8f420100
,
0x3042003e
,
0x14400011
,
0x24020001
,
0xaf400048
,
0x8f420100
,
0x304207c0
,
0x10400005
,
0x00000000
,
0xaf40004c
,
0xaf400050
,
0x03e00008
,
0x24020001
,
0xaf400054
,
0xaf400040
,
0x8f420100
,
0x30423800
,
0x54400001
,
0xaf400044
,
0x24020001
,
0x03e00008
,
0x00000000
,
0x3c038000
,
0x8f4201b8
,
0x00431024
,
0x1440fffd
,
0x24020002
,
0x240340c9
,
0xaf440180
,
0xa342018b
,
0x3c021000
,
0xa7430188
,
0xaf4501a4
,
0xaf4601a8
,
0xaf4701ac
,
0x03e00008
,
0xaf4201b8
,
0x3c029000
,
0x34420001
,
0x00822025
,
0xaf440020
,
0x3c038000
,
0x8f420020
,
0x00431024
,
0x1440fffd
,
0x00000000
,
0x03e00008
,
0x00000000
,
0x3c028000
,
0x34420001
,
0x00822025
,
0x03e00008
,
0xaf440020
,
0x308600ff
,
0x27450180
,
0x3c038000
,
0x8f4201b8
,
0x00431024
,
0x1440fffd
,
0x00000000
,
0x8f420128
,
0xaca20000
,
0x8f640040
,
0x24030008
,
0x240240c1
,
0xa4a20008
,
0x24020002
,
0xa0a2000b
,
0x3c021000
,
0xa0a6000a
,
0xa4a30010
,
0xa0a00012
,
0xa0a00013
,
0xaca00014
,
0xaca00024
,
0xaca00028
,
0xaca0002c
,
0xaca40018
,
0x03e00008
,
0xaf4201b8
,
0x24020001
,
0xacc40000
,
0x03e00008
,
0xa4e50000
,
0x03e00008
,
0x24020001
,
0x24020001
,
0xaf400044
,
0x03e00008
,
0xaf400050
,
0x00803021
,
0x27450180
,
0x3c038000
,
0x8f4201b8
,
0x00431024
,
0x1440fffd
,
0x00000000
,
0x8f420128
,
0xaca20000
,
0x8cc30018
,
0x240240c1
,
0xa4a20008
,
0xaca30018
,
0x90c4000a
,
0x24020002
,
0xa0a2000b
,
0xa0a4000a
,
0x94c20010
,
0xa4a20010
,
0x90c30012
,
0xa0a30012
,
0x90c20013
,
0xa0a20013
,
0x8cc30014
,
0xaca30014
,
0x8cc20024
,
0xaca20024
,
0x8cc30028
,
0xaca30028
,
0x8cc2002c
,
0x3c031000
,
0xaca2002c
,
0x24020001
,
0xaf4301b8
,
0xaf400044
,
0x03e00008
,
0xaf400050
,
0x27bdffe8
,
0xafbf0010
,
0x0e001032
,
0x00000000
,
0x00002021
,
0x0e000c99
,
0xaf400180
,
0x8fbf0010
,
0x03e00008
,
0x27bd0018
,
0x8f460148
,
0x27450180
,
0x3c038000
,
0x00061402
,
0x304700ff
,
0x8f4201b8
,
0x00431024
,
0x1440fffd
,
0x00000000
,
0x8f440140
,
0x00061202
,
0x304200ff
,
0x00061c02
,
0xaca20004
,
0x24020002
,
0xa4a30008
,
0x30c300ff
,
0xa0a2000b
,
0xaca30024
,
0x10e0000a
,
0xaca40000
,
0x28e20004
,
0x14400005
,
0x24020001
,
0x24020005
,
0x54e20005
,
0xa0a0000a
,
0x24020001
,
0x0a001571
,
0xa0a2000a
,
0xa0a0000a
,
0x3c021000
,
0x03e00008
,
0xaf4201b8
,
0x03e00008
,
0x00001021
,
0x10c00007
,
0x00000000
,
0x8ca20000
,
0x24c6ffff
,
0x24a50004
,
0xac820000
,
0x14c0fffb
,
0x24840004
,
0x03e00008
,
0x00000000
,
0x0a001587
,
0x00a01021
,
0xac860000
,
0x00000000
,
0x00000000
,
0x24840004
,
0x00a01021
,
0x1440fffa
,
0x24a5ffff
,
0x03e00008
,
0x00000000
,
0x00000000
};
0xa0a6000a
,
0xa4a30010
,
0xa0a00012
,
0xa0a00013
,
0xaca00014
,
0xaca00024
,
0xaca00028
,
0xaca0002c
,
0xaca40018
,
0x03e00008
,
0xaf4201b8
,
0x24020001
,
0xacc40000
,
0x03e00008
,
0xa4e50000
,
0x24020001
,
0xaf400044
,
0x03e00008
,
0xaf400050
,
0x00803021
,
0x27450180
,
0x3c038000
,
0x8f4201b8
,
0x00431024
,
0x1440fffd
,
0x00000000
,
0x8f420128
,
0xaca20000
,
0x8cc30018
,
0x240240c1
,
0xa4a20008
,
0xaca30018
,
0x90c4000a
,
0x24020002
,
0xa0a2000b
,
0xa0a4000a
,
0x94c20010
,
0xa4a20010
,
0x90c30012
,
0xa0a30012
,
0x90c20013
,
0xa0a20013
,
0x8cc30014
,
0xaca30014
,
0x8cc20024
,
0xaca20024
,
0x8cc30028
,
0xaca30028
,
0x8cc2002c
,
0x3c031000
,
0xaca2002c
,
0x24020001
,
0xaf4301b8
,
0xaf400044
,
0x03e00008
,
0xaf400050
,
0x27bdffe8
,
0xafbf0010
,
0x0e001047
,
0x00000000
,
0x00002021
,
0x0e000c78
,
0xaf400180
,
0x8fbf0010
,
0x03e00008
,
0x27bd0018
,
0x8f460148
,
0x27450180
,
0x3c038000
,
0x00061402
,
0x304700ff
,
0x8f4201b8
,
0x00431024
,
0x1440fffd
,
0x00000000
,
0x8f440140
,
0x00061202
,
0x304200ff
,
0x00061c02
,
0xaca20004
,
0x24020002
,
0xa4a30008
,
0x30c300ff
,
0xa0a2000b
,
0xaca30024
,
0x10e0000a
,
0xaca40000
,
0x28e20004
,
0x14400005
,
0x24020001
,
0x24020005
,
0x54e20005
,
0xa0a0000a
,
0x24020001
,
0x0a001609
,
0xa0a2000a
,
0xa0a0000a
,
0x3c021000
,
0x03e00008
,
0xaf4201b8
,
0x03e00008
,
0x00001021
,
0x10c00007
,
0x00000000
,
0x8ca20000
,
0x24c6ffff
,
0x24a50004
,
0xac820000
,
0x14c0fffb
,
0x24840004
,
0x03e00008
,
0x00000000
,
0x0a00161f
,
0x00a01021
,
0xac860000
,
0x00000000
,
0x00000000
,
0x24840004
,
0x00a01021
,
0x1440fffa
,
0x24a5ffff
,
0x03e00008
,
0x00000000
,
0x00000000
};
static
u32
bnx2_RXP_b06FwData
[(
0x0
/
4
)
+
1
]
=
{
0x0
};
static
u32
bnx2_RXP_b06FwRodata
[(
0x0
/
4
)
+
1
]
=
{
0x0
};
static
u32
bnx2_RXP_b06FwBss
[(
0x1394
/
4
)
+
1
]
=
{
0x0
};
static
u32
bnx2_RXP_b06FwSbss
[(
0x18
/
4
)
+
1
]
=
{
0x0
};
static
u32
bnx2_RXP_b06FwRodata
[(
0x28
/
4
)
+
1
]
=
{
0x0800468c
,
0x0800458c
,
0x08004630
,
0x08004648
,
0x08004660
,
0x08004680
,
0x0800468c
,
0x0800468c
,
0x08004594
,
0x00000000
,
0x00000000
};
static
u32
bnx2_RXP_b06FwBss
[(
0x13a4
/
4
)
+
1
]
=
{
0x0
};
static
u32
bnx2_RXP_b06FwSbss
[(
0x1c
/
4
)
+
1
]
=
{
0x0
};
static
u32
bnx2_rv2p_proc1
[]
=
{
0x00000008
,
0xac000001
,
0x0000000c
,
0x2f800001
,
0x00000010
,
0x213f0004
,
...
...
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