Commit 0807dc76 authored by Shinas Rasheed's avatar Shinas Rasheed Committed by Paolo Abeni

octeon_ep: support Octeon CN10K devices

Add PCI Endpoint NIC support for Octeon CN10K devices.
CN10K devices are part of Octeon 10 family products with
similar PCI NIC characteristics. These include:
- CN10KA
- CNF10KA
- CNF10KB
- CN10KB

Update supported device list in Documentation
Signed-off-by: default avatarShinas Rasheed <srasheed@marvell.com>
Link: https://lore.kernel.org/r/20231117103817.2468176-1-srasheed@marvell.comSigned-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent 31c54867
...@@ -24,6 +24,10 @@ Supported Devices ...@@ -24,6 +24,10 @@ Supported Devices
Currently, this driver support following devices: Currently, this driver support following devices:
* Network controller: Cavium, Inc. Device b200 * Network controller: Cavium, Inc. Device b200
* Network controller: Cavium, Inc. Device b400 * Network controller: Cavium, Inc. Device b400
* Network controller: Cavium, Inc. Device b900
* Network controller: Cavium, Inc. Device ba00
* Network controller: Cavium, Inc. Device bc00
* Network controller: Cavium, Inc. Device bd00
Interface Control Interface Control
================= =================
......
...@@ -6,4 +6,5 @@ ...@@ -6,4 +6,5 @@
obj-$(CONFIG_OCTEON_EP) += octeon_ep.o obj-$(CONFIG_OCTEON_EP) += octeon_ep.o
octeon_ep-y := octep_main.o octep_cn9k_pf.o octep_tx.o octep_rx.o \ octeon_ep-y := octep_main.o octep_cn9k_pf.o octep_tx.o octep_rx.o \
octep_ethtool.o octep_ctrl_mbox.o octep_ctrl_net.o octep_ethtool.o octep_ctrl_mbox.o octep_ctrl_net.o \
octep_cnxk_pf.o
This diff is collapsed.
...@@ -24,6 +24,10 @@ struct workqueue_struct *octep_wq; ...@@ -24,6 +24,10 @@ struct workqueue_struct *octep_wq;
static const struct pci_device_id octep_pci_id_tbl[] = { static const struct pci_device_id octep_pci_id_tbl[] = {
{PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CN93_PF)}, {PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CN93_PF)},
{PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CNF95N_PF)}, {PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CNF95N_PF)},
{PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CN10KA_PF)},
{PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CNF10KA_PF)},
{PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CNF10KB_PF)},
{PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CN10KB_PF)},
{0, }, {0, },
}; };
MODULE_DEVICE_TABLE(pci, octep_pci_id_tbl); MODULE_DEVICE_TABLE(pci, octep_pci_id_tbl);
...@@ -1147,6 +1151,14 @@ static const char *octep_devid_to_str(struct octep_device *oct) ...@@ -1147,6 +1151,14 @@ static const char *octep_devid_to_str(struct octep_device *oct)
return "CN93XX"; return "CN93XX";
case OCTEP_PCI_DEVICE_ID_CNF95N_PF: case OCTEP_PCI_DEVICE_ID_CNF95N_PF:
return "CNF95N"; return "CNF95N";
case OCTEP_PCI_DEVICE_ID_CN10KA_PF:
return "CN10KA";
case OCTEP_PCI_DEVICE_ID_CNF10KA_PF:
return "CNF10KA";
case OCTEP_PCI_DEVICE_ID_CNF10KB_PF:
return "CNF10KB";
case OCTEP_PCI_DEVICE_ID_CN10KB_PF:
return "CN10KB";
default: default:
return "Unsupported"; return "Unsupported";
} }
...@@ -1192,6 +1204,14 @@ int octep_device_setup(struct octep_device *oct) ...@@ -1192,6 +1204,14 @@ int octep_device_setup(struct octep_device *oct)
OCTEP_MINOR_REV(oct)); OCTEP_MINOR_REV(oct));
octep_device_setup_cn93_pf(oct); octep_device_setup_cn93_pf(oct);
break; break;
case OCTEP_PCI_DEVICE_ID_CNF10KA_PF:
case OCTEP_PCI_DEVICE_ID_CN10KA_PF:
case OCTEP_PCI_DEVICE_ID_CNF10KB_PF:
case OCTEP_PCI_DEVICE_ID_CN10KB_PF:
dev_info(&pdev->dev, "Setting up OCTEON %s PF PASS%d.%d\n",
octep_devid_to_str(oct), OCTEP_MAJOR_REV(oct), OCTEP_MINOR_REV(oct));
octep_device_setup_cnxk_pf(oct);
break;
default: default:
dev_err(&pdev->dev, dev_err(&pdev->dev,
"%s: unsupported device\n", __func__); "%s: unsupported device\n", __func__);
......
...@@ -23,6 +23,11 @@ ...@@ -23,6 +23,11 @@
#define OCTEP_PCI_DEVICE_ID_CNF95N_PF 0xB400 //95N PF #define OCTEP_PCI_DEVICE_ID_CNF95N_PF 0xB400 //95N PF
#define OCTEP_PCI_DEVICE_ID_CN10KA_PF 0xB900 //CN10KA PF
#define OCTEP_PCI_DEVICE_ID_CNF10KA_PF 0xBA00 //CNF10KA PF
#define OCTEP_PCI_DEVICE_ID_CNF10KB_PF 0xBC00 //CNF10KB PF
#define OCTEP_PCI_DEVICE_ID_CN10KB_PF 0xBD00 //CN10KB PF
#define OCTEP_MAX_QUEUES 63 #define OCTEP_MAX_QUEUES 63
#define OCTEP_MAX_IQ OCTEP_MAX_QUEUES #define OCTEP_MAX_IQ OCTEP_MAX_QUEUES
#define OCTEP_MAX_OQ OCTEP_MAX_QUEUES #define OCTEP_MAX_OQ OCTEP_MAX_QUEUES
...@@ -386,6 +391,7 @@ int octep_setup_oqs(struct octep_device *oct); ...@@ -386,6 +391,7 @@ int octep_setup_oqs(struct octep_device *oct);
void octep_free_oqs(struct octep_device *oct); void octep_free_oqs(struct octep_device *oct);
void octep_oq_dbell_init(struct octep_device *oct); void octep_oq_dbell_init(struct octep_device *oct);
void octep_device_setup_cn93_pf(struct octep_device *oct); void octep_device_setup_cn93_pf(struct octep_device *oct);
void octep_device_setup_cnxk_pf(struct octep_device *oct);
int octep_iq_process_completions(struct octep_iq *iq, u16 budget); int octep_iq_process_completions(struct octep_iq *iq, u16 budget);
int octep_oq_process_rx(struct octep_oq *oq, int budget); int octep_oq_process_rx(struct octep_oq *oq, int budget);
void octep_set_ethtool_ops(struct net_device *netdev); void octep_set_ethtool_ops(struct net_device *netdev);
......
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