Commit 08f2e4b2 authored by Shannon Nelson's avatar Shannon Nelson Committed by David S. Miller

ionic: implement support for rx sgl

Even out Rx performance across MTU sizes by changing from full
skb allocations to page-based frag allocations.  The device
supports a form of scatter-gather in the Rx path, so we can
set up a number of pages for each descriptor, all of which are
easier to alloc and pass around than the standard kzalloc'd
buffer.  An skb is wrapped around the pages while processing
the received packets, and pages are recycled as needed, or
left alone if they weren't used in the Rx.
Signed-off-by: default avatarShannon Nelson <snelson@pensando.io>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 089406bc
...@@ -155,12 +155,19 @@ typedef void (*ionic_desc_cb)(struct ionic_queue *q, ...@@ -155,12 +155,19 @@ typedef void (*ionic_desc_cb)(struct ionic_queue *q,
struct ionic_desc_info *desc_info, struct ionic_desc_info *desc_info,
struct ionic_cq_info *cq_info, void *cb_arg); struct ionic_cq_info *cq_info, void *cb_arg);
struct ionic_page_info {
struct page *page;
dma_addr_t dma_addr;
};
struct ionic_desc_info { struct ionic_desc_info {
void *desc; void *desc;
void *sg_desc; void *sg_desc;
struct ionic_desc_info *next; struct ionic_desc_info *next;
unsigned int index; unsigned int index;
unsigned int left; unsigned int left;
unsigned int npages;
struct ionic_page_info pages[IONIC_RX_MAX_SG_ELEMS + 1];
ionic_desc_cb cb; ionic_desc_cb cb;
void *cb_arg; void *cb_arg;
}; };
......
...@@ -622,12 +622,14 @@ static int ionic_lif_rxq_init(struct ionic_lif *lif, struct ionic_qcq *qcq) ...@@ -622,12 +622,14 @@ static int ionic_lif_rxq_init(struct ionic_lif *lif, struct ionic_qcq *qcq)
.lif_index = cpu_to_le16(lif->index), .lif_index = cpu_to_le16(lif->index),
.type = q->type, .type = q->type,
.index = cpu_to_le32(q->index), .index = cpu_to_le32(q->index),
.flags = cpu_to_le16(IONIC_QINIT_F_IRQ), .flags = cpu_to_le16(IONIC_QINIT_F_IRQ |
IONIC_QINIT_F_SG),
.intr_index = cpu_to_le16(cq->bound_intr->index), .intr_index = cpu_to_le16(cq->bound_intr->index),
.pid = cpu_to_le16(q->pid), .pid = cpu_to_le16(q->pid),
.ring_size = ilog2(q->num_descs), .ring_size = ilog2(q->num_descs),
.ring_base = cpu_to_le64(q->base_pa), .ring_base = cpu_to_le64(q->base_pa),
.cq_ring_base = cpu_to_le64(cq->base_pa), .cq_ring_base = cpu_to_le64(cq->base_pa),
.sg_ring_base = cpu_to_le64(q->sg_base_pa),
}, },
}; };
int err; int err;
...@@ -1460,13 +1462,14 @@ static int ionic_txrx_alloc(struct ionic_lif *lif) ...@@ -1460,13 +1462,14 @@ static int ionic_txrx_alloc(struct ionic_lif *lif)
lif->txqcqs[i].qcq->stats = lif->txqcqs[i].stats; lif->txqcqs[i].qcq->stats = lif->txqcqs[i].stats;
} }
flags = IONIC_QCQ_F_RX_STATS | IONIC_QCQ_F_INTR; flags = IONIC_QCQ_F_RX_STATS | IONIC_QCQ_F_SG | IONIC_QCQ_F_INTR;
for (i = 0; i < lif->nxqs; i++) { for (i = 0; i < lif->nxqs; i++) {
err = ionic_qcq_alloc(lif, IONIC_QTYPE_RXQ, i, "rx", flags, err = ionic_qcq_alloc(lif, IONIC_QTYPE_RXQ, i, "rx", flags,
lif->nrxq_descs, lif->nrxq_descs,
sizeof(struct ionic_rxq_desc), sizeof(struct ionic_rxq_desc),
sizeof(struct ionic_rxq_comp), sizeof(struct ionic_rxq_comp),
0, lif->kern_pid, &lif->rxqcqs[i].qcq); sizeof(struct ionic_rxq_sg_desc),
lif->kern_pid, &lif->rxqcqs[i].qcq);
if (err) if (err)
goto err_out; goto err_out;
......
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