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Kirill Smelkov
linux
Commits
0a34fb31
Commit
0a34fb31
authored
Aug 20, 2015
by
Ben Skeggs
Browse files
Options
Browse Files
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Email Patches
Plain Diff
drm/nouveau/pci: new subdev
Signed-off-by:
Ben Skeggs
<
bskeggs@redhat.com
>
parent
fbd58ebd
Changes
15
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Showing
15 changed files
with
491 additions
and
39 deletions
+491
-39
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
+3
-0
drivers/gpu/drm/nouveau/include/nvkm/subdev/pci.h
drivers/gpu/drm/nouveau/include/nvkm/subdev/pci.h
+21
-0
drivers/gpu/drm/nouveau/nvkm/core/subdev.c
drivers/gpu/drm/nouveau/nvkm/core/subdev.c
+1
-0
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+96
-28
drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h
drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h
+1
-0
drivers/gpu/drm/nouveau/nvkm/subdev/Kbuild
drivers/gpu/drm/nouveau/nvkm/subdev/Kbuild
+1
-0
drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowrom.c
drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowrom.c
+6
-11
drivers/gpu/drm/nouveau/nvkm/subdev/pci/Kbuild
drivers/gpu/drm/nouveau/nvkm/subdev/pci/Kbuild
+6
-0
drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c
drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c
+82
-0
drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.c
drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.c
+44
-0
drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv04.c
drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv04.c
+58
-0
drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv40.c
drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv40.c
+65
-0
drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv4c.c
drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv4c.c
+37
-0
drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv50.c
drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv50.c
+51
-0
drivers/gpu/drm/nouveau/nvkm/subdev/pci/priv.h
drivers/gpu/drm/nouveau/nvkm/subdev/pci/priv.h
+19
-0
No files found.
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
View file @
0a34fb31
...
...
@@ -4,6 +4,7 @@
#include <core/object.h>
enum
nvkm_devidx
{
NVKM_SUBDEV_PCI
,
NVKM_SUBDEV_VBIOS
,
NVKM_SUBDEV_DEVINIT
,
NVKM_SUBDEV_IBUS
,
...
...
@@ -108,6 +109,7 @@ struct nvkm_device {
struct
nvkm_mc
*
mc
;
struct
nvkm_mmu
*
mmu
;
struct
nvkm_subdev
*
mxm
;
struct
nvkm_pci
*
pci
;
struct
nvkm_pmu
*
pmu
;
struct
nvkm_therm
*
therm
;
struct
nvkm_timer
*
timer
;
...
...
@@ -168,6 +170,7 @@ struct nvkm_device_chip {
int
(
*
mc
)(
struct
nvkm_device
*
,
int
idx
,
struct
nvkm_mc
**
);
int
(
*
mmu
)(
struct
nvkm_device
*
,
int
idx
,
struct
nvkm_mmu
**
);
int
(
*
mxm
)(
struct
nvkm_device
*
,
int
idx
,
struct
nvkm_subdev
**
);
int
(
*
pci
)(
struct
nvkm_device
*
,
int
idx
,
struct
nvkm_pci
**
);
int
(
*
pmu
)(
struct
nvkm_device
*
,
int
idx
,
struct
nvkm_pmu
**
);
int
(
*
therm
)(
struct
nvkm_device
*
,
int
idx
,
struct
nvkm_therm
**
);
int
(
*
timer
)(
struct
nvkm_device
*
,
int
idx
,
struct
nvkm_timer
**
);
...
...
drivers/gpu/drm/nouveau/include/nvkm/subdev/pci.h
0 → 100644
View file @
0a34fb31
#ifndef __NVKM_PCI_H__
#define __NVKM_PCI_H__
#include <core/subdev.h>
struct
nvkm_pci
{
const
struct
nvkm_pci_func
*
func
;
struct
nvkm_subdev
subdev
;
};
u32
nvkm_pci_rd32
(
struct
nvkm_pci
*
,
u16
addr
);
void
nvkm_pci_wr08
(
struct
nvkm_pci
*
,
u16
addr
,
u8
data
);
void
nvkm_pci_wr32
(
struct
nvkm_pci
*
,
u16
addr
,
u32
data
);
void
nvkm_pci_rom_shadow
(
struct
nvkm_pci
*
,
bool
shadow
);
void
nvkm_pci_msi_rearm
(
struct
nvkm_pci
*
);
int
nv04_pci_new
(
struct
nvkm_device
*
,
int
,
struct
nvkm_pci
**
);
int
nv40_pci_new
(
struct
nvkm_device
*
,
int
,
struct
nvkm_pci
**
);
int
nv4c_pci_new
(
struct
nvkm_device
*
,
int
,
struct
nvkm_pci
**
);
int
nv50_pci_new
(
struct
nvkm_device
*
,
int
,
struct
nvkm_pci
**
);
int
gf100_pci_new
(
struct
nvkm_device
*
,
int
,
struct
nvkm_pci
**
);
#endif
drivers/gpu/drm/nouveau/nvkm/core/subdev.c
View file @
0a34fb31
...
...
@@ -44,6 +44,7 @@ nvkm_subdev_name[NVKM_SUBDEV_NR] = {
[
NVKM_SUBDEV_MC
]
=
"mc"
,
[
NVKM_SUBDEV_MMU
]
=
"mmu"
,
[
NVKM_SUBDEV_MXM
]
=
"mxm"
,
[
NVKM_SUBDEV_PCI
]
=
"pci"
,
[
NVKM_SUBDEV_PMU
]
=
"pmu"
,
[
NVKM_SUBDEV_THERM
]
=
"therm"
,
[
NVKM_SUBDEV_TIMER
]
=
"tmr"
,
...
...
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
View file @
0a34fb31
...
...
@@ -85,6 +85,7 @@ nv4_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -105,6 +106,7 @@ nv5_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -126,6 +128,7 @@ nv10_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -145,6 +148,7 @@ nv11_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -166,6 +170,7 @@ nv15_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -187,6 +192,7 @@ nv17_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -208,6 +214,7 @@ nv18_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -229,6 +236,7 @@ nv1a_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -250,6 +258,7 @@ nv1f_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -271,6 +280,7 @@ nv20_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -292,6 +302,7 @@ nv25_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -313,6 +324,7 @@ nv28_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -334,6 +346,7 @@ nv2a_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -355,6 +368,7 @@ nv30_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -376,6 +390,7 @@ nv31_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -398,6 +413,7 @@ nv34_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -420,6 +436,7 @@ nv35_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -441,6 +458,7 @@ nv36_chipset = {
.
imem
=
nv04_instmem_new
,
.
mc
=
nv04_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv04_pci_new
,
.
timer
=
nv04_timer_new
,
.
disp
=
nv04_disp_new
,
.
dma
=
nv04_dma_new
,
...
...
@@ -463,6 +481,7 @@ nv40_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv40_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv40_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -488,6 +507,7 @@ nv41_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv40_mc_new
,
.
mmu
=
nv41_mmu_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -513,6 +533,7 @@ nv42_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv40_mc_new
,
.
mmu
=
nv41_mmu_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -538,6 +559,7 @@ nv43_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv40_mc_new
,
.
mmu
=
nv41_mmu_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -563,6 +585,7 @@ nv44_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv44_mc_new
,
.
mmu
=
nv44_mmu_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -588,6 +611,7 @@ nv45_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv40_mc_new
,
.
mmu
=
nv04_mmu_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -613,6 +637,7 @@ nv46_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv44_mc_new
,
.
mmu
=
nv44_mmu_new
,
.
pci
=
nv4c_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -638,6 +663,7 @@ nv47_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv40_mc_new
,
.
mmu
=
nv41_mmu_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -663,6 +689,7 @@ nv49_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv40_mc_new
,
.
mmu
=
nv41_mmu_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -688,6 +715,7 @@ nv4a_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv44_mc_new
,
.
mmu
=
nv44_mmu_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -713,6 +741,7 @@ nv4b_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv40_mc_new
,
.
mmu
=
nv41_mmu_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -738,6 +767,7 @@ nv4c_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv4c_mc_new
,
.
mmu
=
nv44_mmu_new
,
.
pci
=
nv4c_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -763,6 +793,7 @@ nv4e_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv4c_mc_new
,
.
mmu
=
nv44_mmu_new
,
.
pci
=
nv4c_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -791,6 +822,7 @@ nv50_chipset = {
.
mc
=
nv50_mc_new
,
.
mmu
=
nv50_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv50_pci_new
,
.
therm
=
nv50_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -816,6 +848,7 @@ nv63_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv4c_mc_new
,
.
mmu
=
nv44_mmu_new
,
.
pci
=
nv4c_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -841,6 +874,7 @@ nv67_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv4c_mc_new
,
.
mmu
=
nv44_mmu_new
,
.
pci
=
nv4c_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -866,6 +900,7 @@ nv68_chipset = {
.
imem
=
nv40_instmem_new
,
.
mc
=
nv4c_mc_new
,
.
mmu
=
nv44_mmu_new
,
.
pci
=
nv4c_pci_new
,
.
therm
=
nv40_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -894,6 +929,7 @@ nv84_chipset = {
.
mc
=
nv50_mc_new
,
.
mmu
=
nv50_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv50_pci_new
,
.
therm
=
g84_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -925,6 +961,7 @@ nv86_chipset = {
.
mc
=
nv50_mc_new
,
.
mmu
=
nv50_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv50_pci_new
,
.
therm
=
g84_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -956,6 +993,7 @@ nv92_chipset = {
.
mc
=
nv50_mc_new
,
.
mmu
=
nv50_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv50_pci_new
,
.
therm
=
g84_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -987,6 +1025,7 @@ nv94_chipset = {
.
mc
=
g94_mc_new
,
.
mmu
=
nv50_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
g84_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -1005,63 +1044,65 @@ nv94_chipset = {
static
const
struct
nvkm_device_chip
nv96_chipset
=
{
.
name
=
"G96"
,
.
bar
=
g84_bar_new
,
.
bios
=
nvkm_bios_new
,
.
gpio
=
g94_gpio_new
,
.
i2c
=
g94_i2c_new
,
.
fuse
=
nv50_fuse_new
,
.
bus
=
g94_bus_new
,
.
clk
=
g84_clk_new
,
.
therm
=
g84_therm_new
,
.
mxm
=
nv50_mxm_new
,
.
devinit
=
g84_devinit_new
,
.
mc
=
g94_mc_new
,
.
bus
=
g94_bus_new
,
.
timer
=
nv41_timer_new
,
.
fb
=
g84_fb_new
,
.
fuse
=
nv50_fuse_new
,
.
gpio
=
g94_gpio_new
,
.
i2c
=
g94_i2c_new
,
.
imem
=
nv50_instmem_new
,
.
mc
=
g94_mc_new
,
.
mmu
=
nv50_mmu_new
,
.
bar
=
g84_bar_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
g84_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
.
bsp
=
g84_bsp_new
,
.
cipher
=
g84_cipher_new
,
.
disp
=
g94_disp_new
,
.
dma
=
nv50_dma_new
,
.
fifo
=
g84_fifo_new
,
.
gr
=
g84_gr_new
,
.
gr
=
nv50_gr_new
,
.
mpeg
=
g84_mpeg_new
,
.
vp
=
g84_vp_new
,
.
cipher
=
g84_cipher_new
,
.
bsp
=
g84_bsp_new
,
.
disp
=
g94_disp_new
,
.
pm
=
g84_pm_new
,
.
sw
=
nv50_sw_new
,
.
vp
=
g84_vp_new
,
};
static
const
struct
nvkm_device_chip
nv98_chipset
=
{
.
name
=
"G98"
,
.
bar
=
g84_bar_new
,
.
bios
=
nvkm_bios_new
,
.
gpio
=
g94_gpio_new
,
.
i2c
=
g94_i2c_new
,
.
fuse
=
nv50_fuse_new
,
.
bus
=
g94_bus_new
,
.
clk
=
g84_clk_new
,
.
therm
=
g84_therm_new
,
.
mxm
=
nv50_mxm_new
,
.
devinit
=
g98_devinit_new
,
.
mc
=
g98_mc_new
,
.
bus
=
g94_bus_new
,
.
timer
=
nv41_timer_new
,
.
fb
=
g84_fb_new
,
.
fuse
=
nv50_fuse_new
,
.
gpio
=
g94_gpio_new
,
.
i2c
=
g94_i2c_new
,
.
imem
=
nv50_instmem_new
,
.
mc
=
g98_mc_new
,
.
mmu
=
nv50_mmu_new
,
.
bar
=
g84_bar_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
g84_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
.
disp
=
g94_disp_new
,
.
dma
=
nv50_dma_new
,
.
fifo
=
g84_fifo_new
,
.
gr
=
g84_gr_new
,
.
sw
=
nv50_sw_new
,
.
mspdec
=
g98_mspdec_new
,
.
sec
=
g98_sec_new
,
.
msvld
=
g98_msvld_new
,
.
msppp
=
g98_msppp_new
,
.
disp
=
g94_disp
_new
,
.
msvld
=
g98_msvld
_new
,
.
pm
=
g84_pm_new
,
.
sec
=
g98_sec_new
,
.
sw
=
nv50_sw_new
,
};
static
const
struct
nvkm_device_chip
...
...
@@ -1080,6 +1121,7 @@ nva0_chipset = {
.
mc
=
g98_mc_new
,
.
mmu
=
nv50_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
g84_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -1111,6 +1153,7 @@ nva3_chipset = {
.
mc
=
g98_mc_new
,
.
mmu
=
nv50_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gt215_pmu_new
,
.
therm
=
gt215_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1144,6 +1187,7 @@ nva5_chipset = {
.
mc
=
g98_mc_new
,
.
mmu
=
nv50_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gt215_pmu_new
,
.
therm
=
gt215_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1176,6 +1220,7 @@ nva8_chipset = {
.
mc
=
g98_mc_new
,
.
mmu
=
nv50_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gt215_pmu_new
,
.
therm
=
gt215_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1208,6 +1253,7 @@ nvaa_chipset = {
.
mc
=
g98_mc_new
,
.
mmu
=
nv50_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
g84_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -1239,6 +1285,7 @@ nvac_chipset = {
.
mc
=
g98_mc_new
,
.
mmu
=
nv50_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
g84_therm_new
,
.
timer
=
nv41_timer_new
,
.
volt
=
nv40_volt_new
,
...
...
@@ -1270,6 +1317,7 @@ nvaf_chipset = {
.
mc
=
g98_mc_new
,
.
mmu
=
nv50_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gt215_pmu_new
,
.
therm
=
gt215_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1304,6 +1352,7 @@ nvc0_chipset = {
.
mc
=
gf100_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
gf100_pci_new
,
.
pmu
=
gf100_pmu_new
,
.
therm
=
gt215_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1339,6 +1388,7 @@ nvc1_chipset = {
.
mc
=
gf106_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gf100_pmu_new
,
.
therm
=
gt215_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1373,6 +1423,7 @@ nvc3_chipset = {
.
mc
=
gf106_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gf100_pmu_new
,
.
therm
=
gt215_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1407,6 +1458,7 @@ nvc4_chipset = {
.
mc
=
gf100_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
gf100_pci_new
,
.
pmu
=
gf100_pmu_new
,
.
therm
=
gt215_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1442,6 +1494,7 @@ nvc8_chipset = {
.
mc
=
gf100_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
gf100_pci_new
,
.
pmu
=
gf100_pmu_new
,
.
therm
=
gt215_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1477,6 +1530,7 @@ nvce_chipset = {
.
mc
=
gf100_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
gf100_pci_new
,
.
pmu
=
gf100_pmu_new
,
.
therm
=
gt215_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1512,6 +1566,7 @@ nvcf_chipset = {
.
mc
=
gf106_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gf100_pmu_new
,
.
therm
=
gt215_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1546,6 +1601,7 @@ nvd7_chipset = {
.
mc
=
gf106_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
therm
=
gf119_therm_new
,
.
timer
=
nv41_timer_new
,
.
ce
[
0
]
=
gf100_ce_new
,
...
...
@@ -1578,6 +1634,7 @@ nvd9_chipset = {
.
mc
=
gf106_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gf119_pmu_new
,
.
therm
=
gf119_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1612,6 +1669,7 @@ nve4_chipset = {
.
mc
=
gf106_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gk104_pmu_new
,
.
therm
=
gf119_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1648,6 +1706,7 @@ nve6_chipset = {
.
mc
=
gf106_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gk104_pmu_new
,
.
therm
=
gf119_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1684,6 +1743,7 @@ nve7_chipset = {
.
mc
=
gf106_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gf119_pmu_new
,
.
therm
=
gf119_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1744,6 +1804,7 @@ nvf0_chipset = {
.
mc
=
gf106_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gk110_pmu_new
,
.
therm
=
gf119_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1779,6 +1840,7 @@ nvf1_chipset = {
.
mc
=
gf106_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gk110_pmu_new
,
.
therm
=
gf119_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1814,6 +1876,7 @@ nv106_chipset = {
.
mc
=
gk20a_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gk208_pmu_new
,
.
therm
=
gf119_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1849,6 +1912,7 @@ nv108_chipset = {
.
mc
=
gk20a_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gk208_pmu_new
,
.
therm
=
gf119_therm_new
,
.
timer
=
nv41_timer_new
,
...
...
@@ -1884,6 +1948,7 @@ nv117_chipset = {
.
mc
=
gk20a_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gm107_pmu_new
,
.
therm
=
gm107_therm_new
,
.
timer
=
gk20a_timer_new
,
...
...
@@ -1913,6 +1978,7 @@ nv124_chipset = {
.
mc
=
gk20a_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gm107_pmu_new
,
.
timer
=
gk20a_timer_new
,
.
ce
[
0
]
=
gm204_ce_new
,
...
...
@@ -1942,6 +2008,7 @@ nv126_chipset = {
.
mc
=
gk20a_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mxm
=
nv50_mxm_new
,
.
pci
=
nv40_pci_new
,
.
pmu
=
gm107_pmu_new
,
.
timer
=
gk20a_timer_new
,
.
ce
[
0
]
=
gm204_ce_new
,
...
...
@@ -1966,7 +2033,6 @@ nv12b_chipset = {
.
ltc
=
gm107_ltc_new
,
.
mc
=
gk20a_mc_new
,
.
mmu
=
gf100_mmu_new
,
.
mmu
=
gf100_mmu_new
,
.
timer
=
gk20a_timer_new
,
.
ce
[
2
]
=
gm204_ce_new
,
.
dma
=
gf119_dma_new
,
...
...
@@ -2018,6 +2084,7 @@ nvkm_device_subdev(struct nvkm_device *device, int index)
_
(
MC
,
device
->
mc
,
&
device
->
mc
->
subdev
);
_
(
MMU
,
device
->
mmu
,
&
device
->
mmu
->
subdev
);
_
(
MXM
,
device
->
mxm
,
device
->
mxm
);
_
(
PCI
,
device
->
pci
,
&
device
->
pci
->
subdev
);
_
(
PMU
,
device
->
pmu
,
&
device
->
pmu
->
subdev
);
_
(
THERM
,
device
->
therm
,
&
device
->
therm
->
subdev
);
_
(
TIMER
,
device
->
timer
,
&
device
->
timer
->
subdev
);
...
...
@@ -2504,6 +2571,7 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
_
(
NVKM_SUBDEV_MC
,
mc
);
_
(
NVKM_SUBDEV_MMU
,
mmu
);
_
(
NVKM_SUBDEV_MXM
,
mxm
);
_
(
NVKM_SUBDEV_PCI
,
pci
);
_
(
NVKM_SUBDEV_PMU
,
pmu
);
_
(
NVKM_SUBDEV_THERM
,
therm
);
_
(
NVKM_SUBDEV_TIMER
,
timer
);
...
...
drivers/gpu/drm/nouveau/nvkm/engine/device/priv.h
View file @
0a34fb31
...
...
@@ -17,6 +17,7 @@
#include <subdev/mc.h>
#include <subdev/mmu.h>
#include <subdev/mxm.h>
#include <subdev/pci.h>
#include <subdev/pmu.h>
#include <subdev/therm.h>
#include <subdev/timer.h>
...
...
drivers/gpu/drm/nouveau/nvkm/subdev/Kbuild
View file @
0a34fb31
...
...
@@ -13,6 +13,7 @@ include $(src)/nvkm/subdev/ltc/Kbuild
include $(src)/nvkm/subdev/mc/Kbuild
include $(src)/nvkm/subdev/mmu/Kbuild
include $(src)/nvkm/subdev/mxm/Kbuild
include $(src)/nvkm/subdev/pci/Kbuild
include $(src)/nvkm/subdev/pmu/Kbuild
include $(src)/nvkm/subdev/therm/Kbuild
include $(src)/nvkm/subdev/timer/Kbuild
...
...
drivers/gpu/drm/nouveau/nvkm/subdev/bios/shadowrom.c
View file @
0a34fb31
...
...
@@ -22,6 +22,8 @@
*/
#include "priv.h"
#include <subdev/pci.h>
static
u32
prom_read
(
void
*
data
,
u32
offset
,
u32
length
,
struct
nvkm_bios
*
bios
)
{
...
...
@@ -39,23 +41,16 @@ static void
prom_fini
(
void
*
data
)
{
struct
nvkm_device
*
device
=
data
;
if
(
device
->
card_type
<
NV_50
)
nvkm_mask
(
device
,
0x001850
,
0x00000001
,
0x00000001
);
else
nvkm_mask
(
device
,
0x088050
,
0x00000001
,
0x00000001
);
nvkm_pci_rom_shadow
(
device
->
pci
,
true
);
}
static
void
*
prom_init
(
struct
nvkm_bios
*
bios
,
const
char
*
name
)
{
struct
nvkm_device
*
device
=
bios
->
subdev
.
device
;
if
(
device
->
card_type
<
NV_50
)
{
if
(
device
->
card_type
==
NV_40
&&
device
->
chipset
>=
0x4c
)
return
ERR_PTR
(
-
ENODEV
);
nvkm_mask
(
device
,
0x001850
,
0x00000001
,
0x00000000
);
}
else
{
nvkm_mask
(
device
,
0x088050
,
0x00000001
,
0x00000000
);
}
if
(
device
->
card_type
==
NV_40
&&
device
->
chipset
>=
0x4c
)
return
ERR_PTR
(
-
ENODEV
);
nvkm_pci_rom_shadow
(
device
->
pci
,
false
);
return
device
;
}
...
...
drivers/gpu/drm/nouveau/nvkm/subdev/pci/Kbuild
0 → 100644
View file @
0a34fb31
nvkm-y += nvkm/subdev/pci/base.o
nvkm-y += nvkm/subdev/pci/nv04.o
nvkm-y += nvkm/subdev/pci/nv40.o
nvkm-y += nvkm/subdev/pci/nv4c.o
nvkm-y += nvkm/subdev/pci/nv50.o
nvkm-y += nvkm/subdev/pci/gf100.o
drivers/gpu/drm/nouveau/nvkm/subdev/pci/base.c
0 → 100644
View file @
0a34fb31
/*
* Copyright 2015 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "priv.h"
u32
nvkm_pci_rd32
(
struct
nvkm_pci
*
pci
,
u16
addr
)
{
return
pci
->
func
->
rd32
(
pci
,
addr
);
}
void
nvkm_pci_wr08
(
struct
nvkm_pci
*
pci
,
u16
addr
,
u8
data
)
{
pci
->
func
->
wr08
(
pci
,
addr
,
data
);
}
void
nvkm_pci_wr32
(
struct
nvkm_pci
*
pci
,
u16
addr
,
u32
data
)
{
pci
->
func
->
wr32
(
pci
,
addr
,
data
);
}
void
nvkm_pci_rom_shadow
(
struct
nvkm_pci
*
pci
,
bool
shadow
)
{
u32
data
=
nvkm_pci_rd32
(
pci
,
0x0050
);
if
(
shadow
)
data
|=
0x00000001
;
else
data
&=
~
0x00000001
;
nvkm_pci_wr32
(
pci
,
0x0050
,
data
);
}
void
nvkm_pci_msi_rearm
(
struct
nvkm_pci
*
pci
)
{
pci
->
func
->
msi_rearm
(
pci
);
}
static
void
*
nvkm_pci_dtor
(
struct
nvkm_subdev
*
subdev
)
{
return
nvkm_pci
(
subdev
);
}
static
const
struct
nvkm_subdev_func
nvkm_pci_func
=
{
.
dtor
=
nvkm_pci_dtor
,
};
int
nvkm_pci_new_
(
const
struct
nvkm_pci_func
*
func
,
struct
nvkm_device
*
device
,
int
index
,
struct
nvkm_pci
**
ppci
)
{
struct
nvkm_pci
*
pci
;
if
(
!
(
pci
=
*
ppci
=
kzalloc
(
sizeof
(
**
ppci
),
GFP_KERNEL
)))
return
-
ENOMEM
;
nvkm_subdev_ctor
(
&
nvkm_pci_func
,
device
,
index
,
0
,
&
pci
->
subdev
);
pci
->
func
=
func
;
return
0
;
}
drivers/gpu/drm/nouveau/nvkm/subdev/pci/gf100.c
0 → 100644
View file @
0a34fb31
/*
* Copyright 2015 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "priv.h"
static
void
gf100_pci_msi_rearm
(
struct
nvkm_pci
*
pci
)
{
nvkm_pci_wr08
(
pci
,
0x0704
,
0xff
);
}
static
const
struct
nvkm_pci_func
gf100_pci_func
=
{
.
rd32
=
nv40_pci_rd32
,
.
wr08
=
nv40_pci_wr08
,
.
wr32
=
nv40_pci_wr32
,
.
msi_rearm
=
gf100_pci_msi_rearm
,
};
int
gf100_pci_new
(
struct
nvkm_device
*
device
,
int
index
,
struct
nvkm_pci
**
ppci
)
{
return
nvkm_pci_new_
(
&
gf100_pci_func
,
device
,
index
,
ppci
);
}
drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv04.c
0 → 100644
View file @
0a34fb31
/*
* Copyright 2015 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "priv.h"
static
u32
nv04_pci_rd32
(
struct
nvkm_pci
*
pci
,
u16
addr
)
{
struct
nvkm_device
*
device
=
pci
->
subdev
.
device
;
return
nvkm_rd32
(
device
,
0x001800
+
addr
);
}
static
void
nv04_pci_wr08
(
struct
nvkm_pci
*
pci
,
u16
addr
,
u8
data
)
{
struct
nvkm_device
*
device
=
pci
->
subdev
.
device
;
nvkm_wr08
(
device
,
0x001800
+
addr
,
data
);
}
static
void
nv04_pci_wr32
(
struct
nvkm_pci
*
pci
,
u16
addr
,
u32
data
)
{
struct
nvkm_device
*
device
=
pci
->
subdev
.
device
;
nvkm_wr32
(
device
,
0x001800
+
addr
,
data
);
}
static
const
struct
nvkm_pci_func
nv04_pci_func
=
{
.
rd32
=
nv04_pci_rd32
,
.
wr08
=
nv04_pci_wr08
,
.
wr32
=
nv04_pci_wr32
,
};
int
nv04_pci_new
(
struct
nvkm_device
*
device
,
int
index
,
struct
nvkm_pci
**
ppci
)
{
return
nvkm_pci_new_
(
&
nv04_pci_func
,
device
,
index
,
ppci
);
}
drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv40.c
0 → 100644
View file @
0a34fb31
/*
* Copyright 2015 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "priv.h"
u32
nv40_pci_rd32
(
struct
nvkm_pci
*
pci
,
u16
addr
)
{
struct
nvkm_device
*
device
=
pci
->
subdev
.
device
;
return
nvkm_rd32
(
device
,
0x088000
+
addr
);
}
void
nv40_pci_wr08
(
struct
nvkm_pci
*
pci
,
u16
addr
,
u8
data
)
{
struct
nvkm_device
*
device
=
pci
->
subdev
.
device
;
nvkm_wr08
(
device
,
0x088000
+
addr
,
data
);
}
void
nv40_pci_wr32
(
struct
nvkm_pci
*
pci
,
u16
addr
,
u32
data
)
{
struct
nvkm_device
*
device
=
pci
->
subdev
.
device
;
nvkm_wr32
(
device
,
0x088000
+
addr
,
data
);
}
static
void
nv40_pci_msi_rearm
(
struct
nvkm_pci
*
pci
)
{
nvkm_pci_wr08
(
pci
,
0x0068
,
0xff
);
}
static
const
struct
nvkm_pci_func
nv40_pci_func
=
{
.
rd32
=
nv40_pci_rd32
,
.
wr08
=
nv40_pci_wr08
,
.
wr32
=
nv40_pci_wr32
,
.
msi_rearm
=
nv40_pci_msi_rearm
,
};
int
nv40_pci_new
(
struct
nvkm_device
*
device
,
int
index
,
struct
nvkm_pci
**
ppci
)
{
return
nvkm_pci_new_
(
&
nv40_pci_func
,
device
,
index
,
ppci
);
}
drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv4c.c
0 → 100644
View file @
0a34fb31
/*
* Copyright 2015 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "priv.h"
static
const
struct
nvkm_pci_func
nv4c_pci_func
=
{
.
rd32
=
nv40_pci_rd32
,
.
wr08
=
nv40_pci_wr08
,
.
wr32
=
nv40_pci_wr32
,
};
int
nv4c_pci_new
(
struct
nvkm_device
*
device
,
int
index
,
struct
nvkm_pci
**
ppci
)
{
return
nvkm_pci_new_
(
&
nv4c_pci_func
,
device
,
index
,
ppci
);
}
drivers/gpu/drm/nouveau/nvkm/subdev/pci/nv50.c
0 → 100644
View file @
0a34fb31
/*
* Copyright 2015 Red Hat Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs <bskeggs@redhat.com>
*/
#include "priv.h"
#include <core/pci.h>
/* MSI re-arm through the PRI appears to be broken on the original G80,
* so we access it via alternate PCI config space mechanisms.
*/
static
void
nv50_pci_msi_rearm
(
struct
nvkm_pci
*
pci
)
{
struct
nvkm_device
*
device
=
pci
->
subdev
.
device
;
struct
pci_dev
*
pdev
=
device
->
func
->
pci
(
device
)
->
pdev
;
pci_write_config_byte
(
pdev
,
0x68
,
0xff
);
}
static
const
struct
nvkm_pci_func
nv50_pci_func
=
{
.
rd32
=
nv40_pci_rd32
,
.
wr08
=
nv40_pci_wr08
,
.
wr32
=
nv40_pci_wr32
,
.
msi_rearm
=
nv50_pci_msi_rearm
,
};
int
nv50_pci_new
(
struct
nvkm_device
*
device
,
int
index
,
struct
nvkm_pci
**
ppci
)
{
return
nvkm_pci_new_
(
&
nv50_pci_func
,
device
,
index
,
ppci
);
}
drivers/gpu/drm/nouveau/nvkm/subdev/pci/priv.h
0 → 100644
View file @
0a34fb31
#ifndef __NVKM_PCI_PRIV_H__
#define __NVKM_PCI_PRIV_H__
#define nvkm_pci(p) container_of((p), struct nvkm_pci, subdev)
#include <subdev/pci.h>
int
nvkm_pci_new_
(
const
struct
nvkm_pci_func
*
,
struct
nvkm_device
*
,
int
index
,
struct
nvkm_pci
**
);
struct
nvkm_pci_func
{
u32
(
*
rd32
)(
struct
nvkm_pci
*
,
u16
addr
);
void
(
*
wr08
)(
struct
nvkm_pci
*
,
u16
addr
,
u8
data
);
void
(
*
wr32
)(
struct
nvkm_pci
*
,
u16
addr
,
u32
data
);
void
(
*
msi_rearm
)(
struct
nvkm_pci
*
);
};
u32
nv40_pci_rd32
(
struct
nvkm_pci
*
,
u16
);
void
nv40_pci_wr08
(
struct
nvkm_pci
*
,
u16
,
u8
);
void
nv40_pci_wr32
(
struct
nvkm_pci
*
,
u16
,
u32
);
#endif
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