Commit 0b8793f6 authored by Christian König's avatar Christian König

drm/radeon: switch over to the new pin interface

Stop using TTM_PL_FLAG_NO_EVICT.
Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarDave Airlie <airlied@redhat.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Link: https://patchwork.freedesktop.org/patch/391610/?series=81973&rev=1
parent 9d36d432
...@@ -497,7 +497,6 @@ struct radeon_bo { ...@@ -497,7 +497,6 @@ struct radeon_bo {
struct ttm_buffer_object tbo; struct ttm_buffer_object tbo;
struct ttm_bo_kmap_obj kmap; struct ttm_bo_kmap_obj kmap;
u32 flags; u32 flags;
unsigned pin_count;
void *kptr; void *kptr;
u32 tiling_flags; u32 tiling_flags;
u32 pitch; u32 pitch;
......
...@@ -273,10 +273,7 @@ static void radeon_unpin_work_func(struct work_struct *__work) ...@@ -273,10 +273,7 @@ static void radeon_unpin_work_func(struct work_struct *__work)
/* unpin of the old buffer */ /* unpin of the old buffer */
r = radeon_bo_reserve(work->old_rbo, false); r = radeon_bo_reserve(work->old_rbo, false);
if (likely(r == 0)) { if (likely(r == 0)) {
r = radeon_bo_unpin(work->old_rbo); radeon_bo_unpin(work->old_rbo);
if (unlikely(r != 0)) {
DRM_ERROR("failed to unpin buffer after flip\n");
}
radeon_bo_unreserve(work->old_rbo); radeon_bo_unreserve(work->old_rbo);
} else } else
DRM_ERROR("failed to reserve buffer after flip\n"); DRM_ERROR("failed to reserve buffer after flip\n");
...@@ -607,9 +604,7 @@ static int radeon_crtc_page_flip_target(struct drm_crtc *crtc, ...@@ -607,9 +604,7 @@ static int radeon_crtc_page_flip_target(struct drm_crtc *crtc,
DRM_ERROR("failed to reserve new rbo in error path\n"); DRM_ERROR("failed to reserve new rbo in error path\n");
goto cleanup; goto cleanup;
} }
if (unlikely(radeon_bo_unpin(new_rbo) != 0)) { radeon_bo_unpin(new_rbo);
DRM_ERROR("failed to unpin new rbo in error path\n");
}
radeon_bo_unreserve(new_rbo); radeon_bo_unreserve(new_rbo);
cleanup: cleanup:
......
...@@ -334,8 +334,8 @@ int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset, ...@@ -334,8 +334,8 @@ int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset,
if (radeon_ttm_tt_has_userptr(bo->rdev, bo->tbo.ttm)) if (radeon_ttm_tt_has_userptr(bo->rdev, bo->tbo.ttm))
return -EPERM; return -EPERM;
if (bo->pin_count) { if (bo->tbo.pin_count) {
bo->pin_count++; ttm_bo_pin(&bo->tbo);
if (gpu_addr) if (gpu_addr)
*gpu_addr = radeon_bo_gpu_offset(bo); *gpu_addr = radeon_bo_gpu_offset(bo);
...@@ -367,13 +367,11 @@ int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset, ...@@ -367,13 +367,11 @@ int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset,
bo->rdev->mc.visible_vram_size >> PAGE_SHIFT; bo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
else else
bo->placements[i].lpfn = max_offset >> PAGE_SHIFT; bo->placements[i].lpfn = max_offset >> PAGE_SHIFT;
bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
} }
r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx); r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
if (likely(r == 0)) { if (likely(r == 0)) {
bo->pin_count = 1; ttm_bo_pin(&bo->tbo);
if (gpu_addr != NULL) if (gpu_addr != NULL)
*gpu_addr = radeon_bo_gpu_offset(bo); *gpu_addr = radeon_bo_gpu_offset(bo);
if (domain == RADEON_GEM_DOMAIN_VRAM) if (domain == RADEON_GEM_DOMAIN_VRAM)
...@@ -391,32 +389,15 @@ int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr) ...@@ -391,32 +389,15 @@ int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
return radeon_bo_pin_restricted(bo, domain, 0, gpu_addr); return radeon_bo_pin_restricted(bo, domain, 0, gpu_addr);
} }
int radeon_bo_unpin(struct radeon_bo *bo) void radeon_bo_unpin(struct radeon_bo *bo)
{ {
struct ttm_operation_ctx ctx = { false, false }; ttm_bo_unpin(&bo->tbo);
int r, i; if (!bo->tbo.pin_count) {
if (!bo->pin_count) {
dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo);
return 0;
}
bo->pin_count--;
if (bo->pin_count)
return 0;
for (i = 0; i < bo->placement.num_placement; i++) {
bo->placements[i].lpfn = 0;
bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
}
r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
if (likely(r == 0)) {
if (bo->tbo.mem.mem_type == TTM_PL_VRAM) if (bo->tbo.mem.mem_type == TTM_PL_VRAM)
bo->rdev->vram_pin_size -= radeon_bo_size(bo); bo->rdev->vram_pin_size -= radeon_bo_size(bo);
else else
bo->rdev->gart_pin_size -= radeon_bo_size(bo); bo->rdev->gart_pin_size -= radeon_bo_size(bo);
} else {
dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo);
} }
return r;
} }
int radeon_bo_evict_vram(struct radeon_device *rdev) int radeon_bo_evict_vram(struct radeon_device *rdev)
...@@ -549,7 +530,7 @@ int radeon_bo_list_validate(struct radeon_device *rdev, ...@@ -549,7 +530,7 @@ int radeon_bo_list_validate(struct radeon_device *rdev,
list_for_each_entry(lobj, head, tv.head) { list_for_each_entry(lobj, head, tv.head) {
struct radeon_bo *bo = lobj->robj; struct radeon_bo *bo = lobj->robj;
if (!bo->pin_count) { if (!bo->tbo.pin_count) {
u32 domain = lobj->preferred_domains; u32 domain = lobj->preferred_domains;
u32 allowed = lobj->allowed_domains; u32 allowed = lobj->allowed_domains;
u32 current_domain = u32 current_domain =
...@@ -629,7 +610,7 @@ int radeon_bo_get_surface_reg(struct radeon_bo *bo) ...@@ -629,7 +610,7 @@ int radeon_bo_get_surface_reg(struct radeon_bo *bo)
break; break;
old_object = reg->bo; old_object = reg->bo;
if (old_object->pin_count == 0) if (old_object->tbo.pin_count == 0)
steal = i; steal = i;
} }
...@@ -816,7 +797,7 @@ int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo) ...@@ -816,7 +797,7 @@ int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
return 0; return 0;
/* Can't move a pinned BO to visible VRAM */ /* Can't move a pinned BO to visible VRAM */
if (rbo->pin_count > 0) if (rbo->tbo.pin_count > 0)
return -EINVAL; return -EINVAL;
/* hurrah the memory is not visible ! */ /* hurrah the memory is not visible ! */
......
...@@ -146,7 +146,7 @@ extern void radeon_bo_unref(struct radeon_bo **bo); ...@@ -146,7 +146,7 @@ extern void radeon_bo_unref(struct radeon_bo **bo);
extern int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr); extern int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr);
extern int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, extern int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain,
u64 max_offset, u64 *gpu_addr); u64 max_offset, u64 *gpu_addr);
extern int radeon_bo_unpin(struct radeon_bo *bo); extern void radeon_bo_unpin(struct radeon_bo *bo);
extern int radeon_bo_evict_vram(struct radeon_device *rdev); extern int radeon_bo_evict_vram(struct radeon_device *rdev);
extern void radeon_bo_force_delete(struct radeon_device *rdev); extern void radeon_bo_force_delete(struct radeon_device *rdev);
extern int radeon_bo_init(struct radeon_device *rdev); extern int radeon_bo_init(struct radeon_device *rdev);
......
...@@ -308,7 +308,7 @@ static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict, ...@@ -308,7 +308,7 @@ static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
/* Can't move a pinned BO */ /* Can't move a pinned BO */
rbo = container_of(bo, struct radeon_bo, tbo); rbo = container_of(bo, struct radeon_bo, tbo);
if (WARN_ON_ONCE(rbo->pin_count > 0)) if (WARN_ON_ONCE(rbo->tbo.pin_count > 0))
return -EINVAL; return -EINVAL;
rdev = radeon_get_rdev(bo->bdev); rdev = radeon_get_rdev(bo->bdev);
......
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