Commit 0b8cfb6a authored by Bjorn Helgaas's avatar Bjorn Helgaas

PCI: designware: Use typical "for" loop idiom

It's conventional to use "for" rather than "while" for simple iteration.
No functional change.
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent 64989e73
...@@ -214,8 +214,7 @@ static void clear_irq_range(struct pcie_port *pp, unsigned int irq_base, ...@@ -214,8 +214,7 @@ static void clear_irq_range(struct pcie_port *pp, unsigned int irq_base,
{ {
unsigned int i, res, bit, val; unsigned int i, res, bit, val;
i = 0; for (i = 0; i < nvec; i++) {
while (i < nvec) {
irq_set_msi_desc_off(irq_base, i, NULL); irq_set_msi_desc_off(irq_base, i, NULL);
clear_bit(pos + i, pp->msi_irq_in_use); clear_bit(pos + i, pp->msi_irq_in_use);
/* Disable corresponding interrupt on MSI interrupt controller */ /* Disable corresponding interrupt on MSI interrupt controller */
...@@ -224,7 +223,6 @@ static void clear_irq_range(struct pcie_port *pp, unsigned int irq_base, ...@@ -224,7 +223,6 @@ static void clear_irq_range(struct pcie_port *pp, unsigned int irq_base,
dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, &val); dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, &val);
val &= ~(1 << bit); val &= ~(1 << bit);
dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, val); dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, val);
++i;
} }
} }
...@@ -268,8 +266,7 @@ static int assign_irq(int no_irqs, struct msi_desc *desc, int *pos) ...@@ -268,8 +266,7 @@ static int assign_irq(int no_irqs, struct msi_desc *desc, int *pos)
* descs are also successfully allocated. * descs are also successfully allocated.
*/ */
i = 0; for (i = 0; i < no_irqs; i++) {
while (i < no_irqs) {
if (irq_set_msi_desc_off(irq, i, desc) != 0) { if (irq_set_msi_desc_off(irq, i, desc) != 0) {
clear_irq_range(pp, irq, i, pos0); clear_irq_range(pp, irq, i, pos0);
goto no_valid_irq; goto no_valid_irq;
...@@ -281,7 +278,6 @@ static int assign_irq(int no_irqs, struct msi_desc *desc, int *pos) ...@@ -281,7 +278,6 @@ static int assign_irq(int no_irqs, struct msi_desc *desc, int *pos)
dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, &val); dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, &val);
val |= 1 << bit; val |= 1 << bit;
dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, val); dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, val);
i++;
} }
*pos = pos0; *pos = pos0;
......
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