Commit 0be0e44c authored by Punit Agrawal's avatar Punit Agrawal Committed by Will Deacon

arm64: Add AArch32 instruction set condition code checks

Port support for AArch32 instruction condition code checking from arm
to arm64.
Signed-off-by: default avatarPunit Agrawal <punit.agrawal@arm.com>
Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 9b79f52d
#include <../../arm/include/asm/opcodes.h>
...@@ -18,7 +18,8 @@ arm64-obj-y := cputable.o debug-monitors.o entry.o irq.o fpsimd.o \ ...@@ -18,7 +18,8 @@ arm64-obj-y := cputable.o debug-monitors.o entry.o irq.o fpsimd.o \
cpuinfo.o cpuinfo.o
arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \ arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \
sys_compat.o sys_compat.o \
../../arm/kernel/opcodes.o
arm64-obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o arm64-obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o
arm64-obj-$(CONFIG_MODULES) += arm64ksyms.o module.o arm64-obj-$(CONFIG_MODULES) += arm64ksyms.o module.o
arm64-obj-$(CONFIG_SMP) += smp.o smp_spin_table.o topology.o arm64-obj-$(CONFIG_SMP) += smp.o smp_spin_table.o topology.o
......
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