Commit 0d23d059 authored by Heiko Stuebner's avatar Heiko Stuebner Committed by Kukjin Kim

ARM: S3C2416: Add armdiv_mask constant

The S3C2416/2450 has only 3 bits for the armdiv setting instead
of the 4 bits of the S3C2443.
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent 716e84d1
...@@ -65,6 +65,7 @@ ...@@ -65,6 +65,7 @@
#define S3C2443_CLKDIV0_PREDIV_MASK (3<<4) #define S3C2443_CLKDIV0_PREDIV_MASK (3<<4)
#define S3C2443_CLKDIV0_PREDIV_SHIFT (4) #define S3C2443_CLKDIV0_PREDIV_SHIFT (4)
#define S3C2416_CLKDIV0_ARMDIV_MASK (7 << 9)
#define S3C2443_CLKDIV0_ARMDIV_MASK (15<<9) #define S3C2443_CLKDIV0_ARMDIV_MASK (15<<9)
#define S3C2443_CLKDIV0_ARMDIV_SHIFT (9) #define S3C2443_CLKDIV0_ARMDIV_SHIFT (9)
#define S3C2443_CLKDIV0_ARMDIV_1 (0<<9) #define S3C2443_CLKDIV0_ARMDIV_1 (0<<9)
......
...@@ -127,7 +127,7 @@ static struct clk hsmmc0_clk = { ...@@ -127,7 +127,7 @@ static struct clk hsmmc0_clk = {
static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0) static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0)
{ {
clkcon0 &= 7 << S3C2443_CLKDIV0_ARMDIV_SHIFT; clkcon0 &= S3C2416_CLKDIV0_ARMDIV_MASK;
return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT]; return armdiv[clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT];
} }
......
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