Commit 0de0fe95 authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Matthias Brugger

arm64: dts: mediatek: cherry: Enable MT6360 sub-pmic on I2C7

All devices of the Cherry platform have a MT6360 sub-pmic,
providing two LDOs. Add the required node to enable the PMIC
but without regulators yet, as these will be added in a
later commit.
Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarNícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220704101321.44835-10-angelogioacchino.delregno@collabora.comSigned-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent b6267a39
...@@ -161,6 +161,18 @@ &i2c7 { ...@@ -161,6 +161,18 @@ &i2c7 {
clock-frequency = <400000>; clock-frequency = <400000>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&i2c7_pins>; pinctrl-0 = <&i2c7_pins>;
pmic@34 {
#interrupt-cells = <1>;
compatible = "mediatek,mt6360";
reg = <0x34>;
interrupt-controller;
interrupts-extended = <&pio 130 IRQ_TYPE_EDGE_FALLING>;
interrupt-names = "IRQB";
pinctrl-names = "default";
pinctrl-0 = <&subpmic_default>;
wakeup-source;
};
}; };
&mmc0 { &mmc0 {
...@@ -558,6 +570,14 @@ pins-miso { ...@@ -558,6 +570,14 @@ pins-miso {
bias-pull-down; bias-pull-down;
}; };
}; };
subpmic_default: subpmic-default-pins {
subpmic_pin_irq: pins-subpmic-int-n {
pinmux = <PINMUX_GPIO130__FUNC_GPIO130>;
input-enable;
bias-pull-up;
};
};
}; };
&pmic { &pmic {
......
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