Commit 0e775753 authored by Thomas Gleixner's avatar Thomas Gleixner

xtensa: Convert s6000 gpio irq_chip to new functions

Also use proper wrappers for irq_desc access.
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: Chris Zankel <chris@zankel.net>
LKML-Reference: <20110206211137.750284615@linutronix.de>
parent 495e0c79
...@@ -85,30 +85,29 @@ int s6_gpio_init(u32 afsel) ...@@ -85,30 +85,29 @@ int s6_gpio_init(u32 afsel)
return gpiochip_add(&gpiochip); return gpiochip_add(&gpiochip);
} }
static void ack(unsigned int irq) static void ack(struct irq_data *d)
{ {
writeb(1 << (irq - IRQ_BASE), S6_REG_GPIO + S6_GPIO_IC); writeb(1 << (d->irq - IRQ_BASE), S6_REG_GPIO + S6_GPIO_IC);
} }
static void mask(unsigned int irq) static void mask(struct irq_data *d)
{ {
u8 r = readb(S6_REG_GPIO + S6_GPIO_IE); u8 r = readb(S6_REG_GPIO + S6_GPIO_IE);
r &= ~(1 << (irq - IRQ_BASE)); r &= ~(1 << (d->irq - IRQ_BASE));
writeb(r, S6_REG_GPIO + S6_GPIO_IE); writeb(r, S6_REG_GPIO + S6_GPIO_IE);
} }
static void unmask(unsigned int irq) static void unmask(struct irq_data *d)
{ {
u8 m = readb(S6_REG_GPIO + S6_GPIO_IE); u8 m = readb(S6_REG_GPIO + S6_GPIO_IE);
m |= 1 << (irq - IRQ_BASE); m |= 1 << (d->irq - IRQ_BASE);
writeb(m, S6_REG_GPIO + S6_GPIO_IE); writeb(m, S6_REG_GPIO + S6_GPIO_IE);
} }
static int set_type(unsigned int irq, unsigned int type) static int set_type(struct irq_data *d, unsigned int type)
{ {
const u8 m = 1 << (irq - IRQ_BASE); const u8 m = 1 << (d->irq - IRQ_BASE);
irq_flow_handler_t handler; irq_flow_handler_t handler;
struct irq_desc *desc;
u8 reg; u8 reg;
if (type == IRQ_TYPE_PROBE) { if (type == IRQ_TYPE_PROBE) {
...@@ -129,8 +128,7 @@ static int set_type(unsigned int irq, unsigned int type) ...@@ -129,8 +128,7 @@ static int set_type(unsigned int irq, unsigned int type)
handler = handle_edge_irq; handler = handle_edge_irq;
} }
writeb(reg, S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IS); writeb(reg, S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IS);
desc = irq_to_desc(irq); __set_irq_handler_unlocked(irq, handler);
desc->handle_irq = handler;
reg = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IEV); reg = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_IEV);
if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING)) if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING))
...@@ -150,22 +148,23 @@ static int set_type(unsigned int irq, unsigned int type) ...@@ -150,22 +148,23 @@ static int set_type(unsigned int irq, unsigned int type)
static struct irq_chip gpioirqs = { static struct irq_chip gpioirqs = {
.name = "GPIO", .name = "GPIO",
.ack = ack, .irq_ack = ack,
.mask = mask, .irq_mask = mask,
.unmask = unmask, .irq_unmask = unmask,
.set_type = set_type, .irq_set_type = set_type,
}; };
static u8 demux_masks[4]; static u8 demux_masks[4];
static void demux_irqs(unsigned int irq, struct irq_desc *desc) static void demux_irqs(unsigned int irq, struct irq_desc *desc)
{ {
struct irq_chip *chip = get_irq_desc_chip(desc);
u8 *mask = get_irq_desc_data(desc); u8 *mask = get_irq_desc_data(desc);
u8 pending; u8 pending;
int cirq; int cirq;
desc->chip->mask(irq); chip->irq_mask(&desc->irq_data);
desc->chip->ack(irq); chip->irq_ack(&desc->irq_data));
pending = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_MIS) & *mask; pending = readb(S6_REG_GPIO + S6_GPIO_BANK(0) + S6_GPIO_MIS) & *mask;
cirq = IRQ_BASE - 1; cirq = IRQ_BASE - 1;
while (pending) { while (pending) {
...@@ -174,7 +173,7 @@ static void demux_irqs(unsigned int irq, struct irq_desc *desc) ...@@ -174,7 +173,7 @@ static void demux_irqs(unsigned int irq, struct irq_desc *desc)
pending >>= n; pending >>= n;
generic_handle_irq(cirq); generic_handle_irq(cirq);
} }
desc->chip->unmask(irq); chip->irq_unmask(&desc->irq_data));
} }
extern const signed char *platform_irq_mappings[XTENSA_NR_IRQS]; extern const signed char *platform_irq_mappings[XTENSA_NR_IRQS];
......
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