Commit 0f1f88a8 authored by Giuseppe CAVALLARO's avatar Giuseppe CAVALLARO Committed by David S. Miller

stmmac: verify the dma_cfg platform fields

Recently the dma parameters that can be passed from the platform
have been moved from the plat_stmmacenet_data to the stmmac_dma_cfg.

In case of this new structure is not well allocated the driver can
fails. This is an example how this field is managed in ST platforms

static struct stmmac_dma_cfg gmac_dma_setting = {
        .pbl = 32,
};

static struct plat_stmmacenet_data stih415_ethernet_platform_data[] = {
	{
		.dma_cfg = &gmac_dma_setting,
		.has_gmac = 1,
[snip]

This patch so verifies that the dma_cfg passed from the platform.
In case of it is NULL there is no reason that the driver has to fail
and some default values can be passed. These are ok for all the
Synopsys chips and could impact on performances, only.
Signed-off-by: default avatarGiuseppe Cavallaro <peppe.cavallaro@st.com>
cc: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 4bfcbd7a
...@@ -147,6 +147,7 @@ struct stmmac_extra_stats { ...@@ -147,6 +147,7 @@ struct stmmac_extra_stats {
#define DMA_HW_FEAT_FLEXIPPSEN 0x04000000 /* Flexible PPS Output */ #define DMA_HW_FEAT_FLEXIPPSEN 0x04000000 /* Flexible PPS Output */
#define DMA_HW_FEAT_SAVLANINS 0x08000000 /* Source Addr or VLAN Insertion */ #define DMA_HW_FEAT_SAVLANINS 0x08000000 /* Source Addr or VLAN Insertion */
#define DMA_HW_FEAT_ACTPHYIF 0x70000000 /* Active/selected PHY interface */ #define DMA_HW_FEAT_ACTPHYIF 0x70000000 /* Active/selected PHY interface */
#define DEFAULT_DMA_PBL 8
enum rx_frame_status { /* IPC status */ enum rx_frame_status { /* IPC status */
good_frame = 0, good_frame = 0,
......
...@@ -919,6 +919,24 @@ static void stmmac_check_ether_addr(struct stmmac_priv *priv) ...@@ -919,6 +919,24 @@ static void stmmac_check_ether_addr(struct stmmac_priv *priv)
priv->dev->dev_addr); priv->dev->dev_addr);
} }
static int stmmac_init_dma_engine(struct stmmac_priv *priv)
{
int pbl = DEFAULT_DMA_PBL, fixed_burst = 0, burst_len = 0;
/* Some DMA parameters can be passed from the platform;
* in case of these are not passed we keep a default
* (good for all the chips) and init the DMA! */
if (priv->plat->dma_cfg) {
pbl = priv->plat->dma_cfg->pbl;
fixed_burst = priv->plat->dma_cfg->fixed_burst;
burst_len = priv->plat->dma_cfg->burst_len;
}
return priv->hw->dma->init(priv->ioaddr, pbl, fixed_burst,
burst_len, priv->dma_tx_phy,
priv->dma_rx_phy);
}
/** /**
* stmmac_open - open entry point of the driver * stmmac_open - open entry point of the driver
* @dev : pointer to the device structure. * @dev : pointer to the device structure.
...@@ -967,10 +985,7 @@ static int stmmac_open(struct net_device *dev) ...@@ -967,10 +985,7 @@ static int stmmac_open(struct net_device *dev)
init_dma_desc_rings(dev); init_dma_desc_rings(dev);
/* DMA initialization and SW reset */ /* DMA initialization and SW reset */
ret = priv->hw->dma->init(priv->ioaddr, priv->plat->dma_cfg->pbl, ret = stmmac_init_dma_engine(priv);
priv->plat->dma_cfg->fixed_burst,
priv->plat->dma_cfg->burst_len,
priv->dma_tx_phy, priv->dma_rx_phy);
if (ret < 0) { if (ret < 0) {
pr_err("%s: DMA initialization failed\n", __func__); pr_err("%s: DMA initialization failed\n", __func__);
goto open_error; goto open_error;
......
...@@ -28,6 +28,7 @@ ...@@ -28,6 +28,7 @@
struct plat_stmmacenet_data plat_dat; struct plat_stmmacenet_data plat_dat;
struct stmmac_mdio_bus_data mdio_data; struct stmmac_mdio_bus_data mdio_data;
struct stmmac_dma_cfg dma_cfg;
static void stmmac_default_data(void) static void stmmac_default_data(void)
{ {
...@@ -35,8 +36,6 @@ static void stmmac_default_data(void) ...@@ -35,8 +36,6 @@ static void stmmac_default_data(void)
plat_dat.bus_id = 1; plat_dat.bus_id = 1;
plat_dat.phy_addr = 0; plat_dat.phy_addr = 0;
plat_dat.interface = PHY_INTERFACE_MODE_GMII; plat_dat.interface = PHY_INTERFACE_MODE_GMII;
plat_dat.dma_cfg->pbl = 32;
plat_dat.dma_cfg->burst_len = DMA_AXI_BLEN_256;
plat_dat.clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ plat_dat.clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
plat_dat.has_gmac = 1; plat_dat.has_gmac = 1;
plat_dat.force_sf_dma_mode = 1; plat_dat.force_sf_dma_mode = 1;
...@@ -45,6 +44,10 @@ static void stmmac_default_data(void) ...@@ -45,6 +44,10 @@ static void stmmac_default_data(void)
mdio_data.phy_reset = NULL; mdio_data.phy_reset = NULL;
mdio_data.phy_mask = 0; mdio_data.phy_mask = 0;
plat_dat.mdio_bus_data = &mdio_data; plat_dat.mdio_bus_data = &mdio_data;
dma_cfg.pbl = 32;
dma_cfg.burst_len = DMA_AXI_BLEN_256;
plat_dat.dma_cfg = &dma_cfg;
} }
/** /**
......
...@@ -50,7 +50,6 @@ static int __devinit stmmac_probe_config_dt(struct platform_device *pdev, ...@@ -50,7 +50,6 @@ static int __devinit stmmac_probe_config_dt(struct platform_device *pdev,
* once needed on other platforms. * once needed on other platforms.
*/ */
if (of_device_is_compatible(np, "st,spear600-gmac")) { if (of_device_is_compatible(np, "st,spear600-gmac")) {
plat->dma_cfg->pbl = 8;
plat->has_gmac = 1; plat->has_gmac = 1;
plat->pmt = 1; plat->pmt = 1;
} }
......
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