Commit 0f3b6849 authored by Chris Wilson's avatar Chris Wilson Committed by Daniel Vetter

drm/i915: Record DERRMR, FORCEWAKE and RING_CTL in error-state

These are useful for investigating hangs involving WAIT_FOR_EVENT.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
[danvet: Apply a droplet of Future-Proof in the if-ladder.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 93927ca5
...@@ -641,6 +641,7 @@ static void i915_ring_error_state(struct seq_file *m, ...@@ -641,6 +641,7 @@ static void i915_ring_error_state(struct seq_file *m,
seq_printf(m, "%s command stream:\n", ring_str(ring)); seq_printf(m, "%s command stream:\n", ring_str(ring));
seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]); seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]);
seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]); seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]);
seq_printf(m, " CTL: 0x%08x\n", error->ctl[ring]);
seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]); seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]);
seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]); seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]);
seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]); seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]);
...@@ -693,6 +694,8 @@ static int i915_error_state(struct seq_file *m, void *unused) ...@@ -693,6 +694,8 @@ static int i915_error_state(struct seq_file *m, void *unused)
seq_printf(m, "EIR: 0x%08x\n", error->eir); seq_printf(m, "EIR: 0x%08x\n", error->eir);
seq_printf(m, "IER: 0x%08x\n", error->ier); seq_printf(m, "IER: 0x%08x\n", error->ier);
seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er); seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
seq_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
seq_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
seq_printf(m, "CCID: 0x%08x\n", error->ccid); seq_printf(m, "CCID: 0x%08x\n", error->ccid);
for (i = 0; i < dev_priv->num_fence_regs; i++) for (i = 0; i < dev_priv->num_fence_regs; i++)
......
...@@ -188,10 +188,13 @@ struct drm_i915_error_state { ...@@ -188,10 +188,13 @@ struct drm_i915_error_state {
u32 pgtbl_er; u32 pgtbl_er;
u32 ier; u32 ier;
u32 ccid; u32 ccid;
u32 derrmr;
u32 forcewake;
bool waiting[I915_NUM_RINGS]; bool waiting[I915_NUM_RINGS];
u32 pipestat[I915_MAX_PIPES]; u32 pipestat[I915_MAX_PIPES];
u32 tail[I915_NUM_RINGS]; u32 tail[I915_NUM_RINGS];
u32 head[I915_NUM_RINGS]; u32 head[I915_NUM_RINGS];
u32 ctl[I915_NUM_RINGS];
u32 ipeir[I915_NUM_RINGS]; u32 ipeir[I915_NUM_RINGS];
u32 ipehr[I915_NUM_RINGS]; u32 ipehr[I915_NUM_RINGS];
u32 instdone[I915_NUM_RINGS]; u32 instdone[I915_NUM_RINGS];
......
...@@ -1157,6 +1157,7 @@ static void i915_record_ring_state(struct drm_device *dev, ...@@ -1157,6 +1157,7 @@ static void i915_record_ring_state(struct drm_device *dev,
error->acthd[ring->id] = intel_ring_get_active_head(ring); error->acthd[ring->id] = intel_ring_get_active_head(ring);
error->head[ring->id] = I915_READ_HEAD(ring); error->head[ring->id] = I915_READ_HEAD(ring);
error->tail[ring->id] = I915_READ_TAIL(ring); error->tail[ring->id] = I915_READ_TAIL(ring);
error->ctl[ring->id] = I915_READ_CTL(ring);
error->cpu_ring_head[ring->id] = ring->head; error->cpu_ring_head[ring->id] = ring->head;
error->cpu_ring_tail[ring->id] = ring->tail; error->cpu_ring_tail[ring->id] = ring->tail;
...@@ -1251,6 +1252,16 @@ static void i915_capture_error_state(struct drm_device *dev) ...@@ -1251,6 +1252,16 @@ static void i915_capture_error_state(struct drm_device *dev)
else else
error->ier = I915_READ(IER); error->ier = I915_READ(IER);
if (INTEL_INFO(dev)->gen >= 6)
error->derrmr = I915_READ(DERRMR);
if (IS_VALLEYVIEW(dev))
error->forcewake = I915_READ(FORCEWAKE_VLV);
else if (INTEL_INFO(dev)->gen >= 7)
error->forcewake = I915_READ(FORCEWAKE_MT);
else if (INTEL_INFO(dev)->gen == 6)
error->forcewake = I915_READ(FORCEWAKE);
for_each_pipe(pipe) for_each_pipe(pipe)
error->pipestat[pipe] = I915_READ(PIPESTAT(pipe)); error->pipestat[pipe] = I915_READ(PIPESTAT(pipe));
......
...@@ -512,6 +512,8 @@ ...@@ -512,6 +512,8 @@
#define GEN7_ERR_INT 0x44040 #define GEN7_ERR_INT 0x44040
#define ERR_INT_MMIO_UNCLAIMED (1<<13) #define ERR_INT_MMIO_UNCLAIMED (1<<13)
#define DERRMR 0x44050
/* GM45+ chicken bits -- debug workaround bits that may be required /* GM45+ chicken bits -- debug workaround bits that may be required
* for various sorts of correct behavior. The top 16 bits of each are * for various sorts of correct behavior. The top 16 bits of each are
* the enables for writing to the corresponding low bit. * the enables for writing to the corresponding low bit.
......
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