Commit 109b9186 authored by Laura Abbott's avatar Laura Abbott Committed by Luis Henriques

arm64: Move cpu_resume into the text section

commit c3684fbb upstream.

The function cpu_resume currently lives in the .data section.
There's no reason for it to be there since we can use relative
instructions without a problem. Move a few cpu_resume data
structures out of the assembly file so the .data annotation
can be dropped completely and cpu_resume ends up in the read
only text section.
Reviewed-by: default avatarKees Cook <keescook@chromium.org>
Reviewed-by: default avatarMark Rutland <mark.rutland@arm.com>
Reviewed-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tested-by: default avatarMark Rutland <mark.rutland@arm.com>
Tested-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tested-by: default avatarKees Cook <keescook@chromium.org>
Acked-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: default avatarLaura Abbott <lauraa@codeaurora.org>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
[ luis: 3.16-stable prereq for
  f43c2718 "arm64: kernel: fix __cpu_suspend mm switch on warm-boot" ]
Signed-off-by: default avatarLuis Henriques <luis.henriques@canonical.com>
parent 0fb957f3
...@@ -147,14 +147,12 @@ cpu_resume_after_mmu: ...@@ -147,14 +147,12 @@ cpu_resume_after_mmu:
ret ret
ENDPROC(cpu_resume_after_mmu) ENDPROC(cpu_resume_after_mmu)
.data
ENTRY(cpu_resume) ENTRY(cpu_resume)
bl el2_setup // if in EL2 drop to EL1 cleanly bl el2_setup // if in EL2 drop to EL1 cleanly
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
mrs x1, mpidr_el1 mrs x1, mpidr_el1
adr x4, mpidr_hash_ptr adrp x8, mpidr_hash
ldr x5, [x4] add x8, x8, #:lo12:mpidr_hash // x8 = struct mpidr_hash phys address
add x8, x4, x5 // x8 = struct mpidr_hash phys address
/* retrieve mpidr_hash members to compute the hash */ /* retrieve mpidr_hash members to compute the hash */
ldr x2, [x8, #MPIDR_HASH_MASK] ldr x2, [x8, #MPIDR_HASH_MASK]
ldp w3, w4, [x8, #MPIDR_HASH_SHIFTS] ldp w3, w4, [x8, #MPIDR_HASH_SHIFTS]
...@@ -164,14 +162,15 @@ ENTRY(cpu_resume) ...@@ -164,14 +162,15 @@ ENTRY(cpu_resume)
#else #else
mov x7, xzr mov x7, xzr
#endif #endif
adr x0, sleep_save_sp adrp x0, sleep_save_sp
add x0, x0, #:lo12:sleep_save_sp
ldr x0, [x0, #SLEEP_SAVE_SP_PHYS] ldr x0, [x0, #SLEEP_SAVE_SP_PHYS]
ldr x0, [x0, x7, lsl #3] ldr x0, [x0, x7, lsl #3]
/* load sp from context */ /* load sp from context */
ldr x2, [x0, #CPU_CTX_SP] ldr x2, [x0, #CPU_CTX_SP]
adr x1, sleep_idmap_phys adrp x1, sleep_idmap_phys
/* load physical address of identity map page table in x1 */ /* load physical address of identity map page table in x1 */
ldr x1, [x1] ldr x1, [x1, #:lo12:sleep_idmap_phys]
mov sp, x2 mov sp, x2
/* /*
* cpu_do_resume expects x0 to contain context physical address * cpu_do_resume expects x0 to contain context physical address
...@@ -180,26 +179,3 @@ ENTRY(cpu_resume) ...@@ -180,26 +179,3 @@ ENTRY(cpu_resume)
bl cpu_do_resume // PC relative jump, MMU off bl cpu_do_resume // PC relative jump, MMU off
b cpu_resume_mmu // Resume MMU, never returns b cpu_resume_mmu // Resume MMU, never returns
ENDPROC(cpu_resume) ENDPROC(cpu_resume)
.align 3
mpidr_hash_ptr:
/*
* offset of mpidr_hash symbol from current location
* used to obtain run-time mpidr_hash address with MMU off
*/
.quad mpidr_hash - .
/*
* physical address of identity mapped page tables
*/
.type sleep_idmap_phys, #object
ENTRY(sleep_idmap_phys)
.quad 0
/*
* struct sleep_save_sp {
* phys_addr_t *save_ptr_stash;
* phys_addr_t save_ptr_stash_phys;
* };
*/
.type sleep_save_sp, #object
ENTRY(sleep_save_sp)
.space SLEEP_SAVE_SP_SZ // struct sleep_save_sp
...@@ -126,8 +126,8 @@ int __cpu_suspend(unsigned long arg, int (*fn)(unsigned long)) ...@@ -126,8 +126,8 @@ int __cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
return ret; return ret;
} }
extern struct sleep_save_sp sleep_save_sp; struct sleep_save_sp sleep_save_sp;
extern phys_addr_t sleep_idmap_phys; phys_addr_t sleep_idmap_phys;
static int __init cpu_suspend_init(void) static int __init cpu_suspend_init(void)
{ {
......
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