Commit 11e3bd09 authored by Kyungmin Park's avatar Kyungmin Park Committed by Ben Dooks

[ARM] S3C64XX: Mask the pll values correctly

Correct the PLL field masks to ensure the PLL functions return the
right value.
Signed-off-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
[ben-linux@fluff.org: improve the description text]
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
parent e4ea803a
...@@ -12,9 +12,9 @@ ...@@ -12,9 +12,9 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
#define S3C6400_PLL_MDIV_MASK ((1 << (25-16)) - 1) #define S3C6400_PLL_MDIV_MASK ((1 << (25-16+1)) - 1)
#define S3C6400_PLL_PDIV_MASK ((1 << (13-8)) - 1) #define S3C6400_PLL_PDIV_MASK ((1 << (13-8+1)) - 1)
#define S3C6400_PLL_SDIV_MASK ((1 << (2-0)) - 1) #define S3C6400_PLL_SDIV_MASK ((1 << (2-0+1)) - 1)
#define S3C6400_PLL_MDIV_SHIFT (16) #define S3C6400_PLL_MDIV_SHIFT (16)
#define S3C6400_PLL_PDIV_SHIFT (8) #define S3C6400_PLL_PDIV_SHIFT (8)
#define S3C6400_PLL_SDIV_SHIFT (0) #define S3C6400_PLL_SDIV_SHIFT (0)
......
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