Commit 12375292 authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman

staging: comedi: ni_tio.h: rename the CamelCase enum ni_gpct_register labels

As prefered by the CodingStyle, rename all the CamelCase labels of the
enum ni_gpct_register.

Cleanup all the helper functions in ni_tio_internal.h that used the enum.

The 'counter_index' parameter to all the functions is the ni_gpct_device
'counter_index' which is initialized when the subdevices are setup. This
value is always < 4 so the default: BUG() cases can never happen. For
aesthetics, rename the 'counter_idx' to simply 'idx' and fix the type in
some of the helpers.

Also, remove the unnecessary break statements after the return statements.
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 8b80448d
...@@ -448,208 +448,208 @@ static enum NI_660x_Register ni_gpct_to_660x_register(enum ni_gpct_register reg) ...@@ -448,208 +448,208 @@ static enum NI_660x_Register ni_gpct_to_660x_register(enum ni_gpct_register reg)
{ {
enum NI_660x_Register ni_660x_register; enum NI_660x_Register ni_660x_register;
switch (reg) { switch (reg) {
case NITIO_G0_Autoincrement_Reg: case NITIO_G0_AUTO_INC:
ni_660x_register = G0AutoincrementRegister; ni_660x_register = G0AutoincrementRegister;
break; break;
case NITIO_G1_Autoincrement_Reg: case NITIO_G1_AUTO_INC:
ni_660x_register = G1AutoincrementRegister; ni_660x_register = G1AutoincrementRegister;
break; break;
case NITIO_G2_Autoincrement_Reg: case NITIO_G2_AUTO_INC:
ni_660x_register = G2AutoincrementRegister; ni_660x_register = G2AutoincrementRegister;
break; break;
case NITIO_G3_Autoincrement_Reg: case NITIO_G3_AUTO_INC:
ni_660x_register = G3AutoincrementRegister; ni_660x_register = G3AutoincrementRegister;
break; break;
case NITIO_G0_Command_Reg: case NITIO_G0_CMD:
ni_660x_register = G0CommandRegister; ni_660x_register = G0CommandRegister;
break; break;
case NITIO_G1_Command_Reg: case NITIO_G1_CMD:
ni_660x_register = G1CommandRegister; ni_660x_register = G1CommandRegister;
break; break;
case NITIO_G2_Command_Reg: case NITIO_G2_CMD:
ni_660x_register = G2CommandRegister; ni_660x_register = G2CommandRegister;
break; break;
case NITIO_G3_Command_Reg: case NITIO_G3_CMD:
ni_660x_register = G3CommandRegister; ni_660x_register = G3CommandRegister;
break; break;
case NITIO_G0_HW_Save_Reg: case NITIO_G0_HW_SAVE:
ni_660x_register = G0HWSaveRegister; ni_660x_register = G0HWSaveRegister;
break; break;
case NITIO_G1_HW_Save_Reg: case NITIO_G1_HW_SAVE:
ni_660x_register = G1HWSaveRegister; ni_660x_register = G1HWSaveRegister;
break; break;
case NITIO_G2_HW_Save_Reg: case NITIO_G2_HW_SAVE:
ni_660x_register = G2HWSaveRegister; ni_660x_register = G2HWSaveRegister;
break; break;
case NITIO_G3_HW_Save_Reg: case NITIO_G3_HW_SAVE:
ni_660x_register = G3HWSaveRegister; ni_660x_register = G3HWSaveRegister;
break; break;
case NITIO_G0_SW_Save_Reg: case NITIO_G0_SW_SAVE:
ni_660x_register = G0SWSaveRegister; ni_660x_register = G0SWSaveRegister;
break; break;
case NITIO_G1_SW_Save_Reg: case NITIO_G1_SW_SAVE:
ni_660x_register = G1SWSaveRegister; ni_660x_register = G1SWSaveRegister;
break; break;
case NITIO_G2_SW_Save_Reg: case NITIO_G2_SW_SAVE:
ni_660x_register = G2SWSaveRegister; ni_660x_register = G2SWSaveRegister;
break; break;
case NITIO_G3_SW_Save_Reg: case NITIO_G3_SW_SAVE:
ni_660x_register = G3SWSaveRegister; ni_660x_register = G3SWSaveRegister;
break; break;
case NITIO_G0_Mode_Reg: case NITIO_G0_MODE:
ni_660x_register = G0ModeRegister; ni_660x_register = G0ModeRegister;
break; break;
case NITIO_G1_Mode_Reg: case NITIO_G1_MODE:
ni_660x_register = G1ModeRegister; ni_660x_register = G1ModeRegister;
break; break;
case NITIO_G2_Mode_Reg: case NITIO_G2_MODE:
ni_660x_register = G2ModeRegister; ni_660x_register = G2ModeRegister;
break; break;
case NITIO_G3_Mode_Reg: case NITIO_G3_MODE:
ni_660x_register = G3ModeRegister; ni_660x_register = G3ModeRegister;
break; break;
case NITIO_G0_LoadA_Reg: case NITIO_G0_LOADA:
ni_660x_register = G0LoadARegister; ni_660x_register = G0LoadARegister;
break; break;
case NITIO_G1_LoadA_Reg: case NITIO_G1_LOADA:
ni_660x_register = G1LoadARegister; ni_660x_register = G1LoadARegister;
break; break;
case NITIO_G2_LoadA_Reg: case NITIO_G2_LOADA:
ni_660x_register = G2LoadARegister; ni_660x_register = G2LoadARegister;
break; break;
case NITIO_G3_LoadA_Reg: case NITIO_G3_LOADA:
ni_660x_register = G3LoadARegister; ni_660x_register = G3LoadARegister;
break; break;
case NITIO_G0_LoadB_Reg: case NITIO_G0_LOADB:
ni_660x_register = G0LoadBRegister; ni_660x_register = G0LoadBRegister;
break; break;
case NITIO_G1_LoadB_Reg: case NITIO_G1_LOADB:
ni_660x_register = G1LoadBRegister; ni_660x_register = G1LoadBRegister;
break; break;
case NITIO_G2_LoadB_Reg: case NITIO_G2_LOADB:
ni_660x_register = G2LoadBRegister; ni_660x_register = G2LoadBRegister;
break; break;
case NITIO_G3_LoadB_Reg: case NITIO_G3_LOADB:
ni_660x_register = G3LoadBRegister; ni_660x_register = G3LoadBRegister;
break; break;
case NITIO_G0_Input_Select_Reg: case NITIO_G0_INPUT_SEL:
ni_660x_register = G0InputSelectRegister; ni_660x_register = G0InputSelectRegister;
break; break;
case NITIO_G1_Input_Select_Reg: case NITIO_G1_INPUT_SEL:
ni_660x_register = G1InputSelectRegister; ni_660x_register = G1InputSelectRegister;
break; break;
case NITIO_G2_Input_Select_Reg: case NITIO_G2_INPUT_SEL:
ni_660x_register = G2InputSelectRegister; ni_660x_register = G2InputSelectRegister;
break; break;
case NITIO_G3_Input_Select_Reg: case NITIO_G3_INPUT_SEL:
ni_660x_register = G3InputSelectRegister; ni_660x_register = G3InputSelectRegister;
break; break;
case NITIO_G01_Status_Reg: case NITIO_G01_STATUS:
ni_660x_register = G01StatusRegister; ni_660x_register = G01StatusRegister;
break; break;
case NITIO_G23_Status_Reg: case NITIO_G23_STATUS:
ni_660x_register = G23StatusRegister; ni_660x_register = G23StatusRegister;
break; break;
case NITIO_G01_Joint_Reset_Reg: case NITIO_G01_RESET:
ni_660x_register = G01JointResetRegister; ni_660x_register = G01JointResetRegister;
break; break;
case NITIO_G23_Joint_Reset_Reg: case NITIO_G23_RESET:
ni_660x_register = G23JointResetRegister; ni_660x_register = G23JointResetRegister;
break; break;
case NITIO_G01_Joint_Status1_Reg: case NITIO_G01_STATUS1:
ni_660x_register = G01JointStatus1Register; ni_660x_register = G01JointStatus1Register;
break; break;
case NITIO_G23_Joint_Status1_Reg: case NITIO_G23_STATUS1:
ni_660x_register = G23JointStatus1Register; ni_660x_register = G23JointStatus1Register;
break; break;
case NITIO_G01_Joint_Status2_Reg: case NITIO_G01_STATUS2:
ni_660x_register = G01JointStatus2Register; ni_660x_register = G01JointStatus2Register;
break; break;
case NITIO_G23_Joint_Status2_Reg: case NITIO_G23_STATUS2:
ni_660x_register = G23JointStatus2Register; ni_660x_register = G23JointStatus2Register;
break; break;
case NITIO_G0_Counting_Mode_Reg: case NITIO_G0_CNT_MODE:
ni_660x_register = G0CountingModeRegister; ni_660x_register = G0CountingModeRegister;
break; break;
case NITIO_G1_Counting_Mode_Reg: case NITIO_G1_CNT_MODE:
ni_660x_register = G1CountingModeRegister; ni_660x_register = G1CountingModeRegister;
break; break;
case NITIO_G2_Counting_Mode_Reg: case NITIO_G2_CNT_MODE:
ni_660x_register = G2CountingModeRegister; ni_660x_register = G2CountingModeRegister;
break; break;
case NITIO_G3_Counting_Mode_Reg: case NITIO_G3_CNT_MODE:
ni_660x_register = G3CountingModeRegister; ni_660x_register = G3CountingModeRegister;
break; break;
case NITIO_G0_Second_Gate_Reg: case NITIO_G0_GATE2:
ni_660x_register = G0SecondGateRegister; ni_660x_register = G0SecondGateRegister;
break; break;
case NITIO_G1_Second_Gate_Reg: case NITIO_G1_GATE2:
ni_660x_register = G1SecondGateRegister; ni_660x_register = G1SecondGateRegister;
break; break;
case NITIO_G2_Second_Gate_Reg: case NITIO_G2_GATE2:
ni_660x_register = G2SecondGateRegister; ni_660x_register = G2SecondGateRegister;
break; break;
case NITIO_G3_Second_Gate_Reg: case NITIO_G3_GATE2:
ni_660x_register = G3SecondGateRegister; ni_660x_register = G3SecondGateRegister;
break; break;
case NITIO_G0_DMA_Config_Reg: case NITIO_G0_DMA_CFG:
ni_660x_register = G0DMAConfigRegister; ni_660x_register = G0DMAConfigRegister;
break; break;
case NITIO_G0_DMA_Status_Reg: case NITIO_G0_DMA_STATUS:
ni_660x_register = G0DMAStatusRegister; ni_660x_register = G0DMAStatusRegister;
break; break;
case NITIO_G1_DMA_Config_Reg: case NITIO_G1_DMA_CFG:
ni_660x_register = G1DMAConfigRegister; ni_660x_register = G1DMAConfigRegister;
break; break;
case NITIO_G1_DMA_Status_Reg: case NITIO_G1_DMA_STATUS:
ni_660x_register = G1DMAStatusRegister; ni_660x_register = G1DMAStatusRegister;
break; break;
case NITIO_G2_DMA_Config_Reg: case NITIO_G2_DMA_CFG:
ni_660x_register = G2DMAConfigRegister; ni_660x_register = G2DMAConfigRegister;
break; break;
case NITIO_G2_DMA_Status_Reg: case NITIO_G2_DMA_STATUS:
ni_660x_register = G2DMAStatusRegister; ni_660x_register = G2DMAStatusRegister;
break; break;
case NITIO_G3_DMA_Config_Reg: case NITIO_G3_DMA_CFG:
ni_660x_register = G3DMAConfigRegister; ni_660x_register = G3DMAConfigRegister;
break; break;
case NITIO_G3_DMA_Status_Reg: case NITIO_G3_DMA_STATUS:
ni_660x_register = G3DMAStatusRegister; ni_660x_register = G3DMAStatusRegister;
break; break;
case NITIO_G0_Interrupt_Acknowledge_Reg: case NITIO_G0_INT_ACK:
ni_660x_register = G0InterruptAcknowledge; ni_660x_register = G0InterruptAcknowledge;
break; break;
case NITIO_G1_Interrupt_Acknowledge_Reg: case NITIO_G1_INT_ACK:
ni_660x_register = G1InterruptAcknowledge; ni_660x_register = G1InterruptAcknowledge;
break; break;
case NITIO_G2_Interrupt_Acknowledge_Reg: case NITIO_G2_INT_ACK:
ni_660x_register = G2InterruptAcknowledge; ni_660x_register = G2InterruptAcknowledge;
break; break;
case NITIO_G3_Interrupt_Acknowledge_Reg: case NITIO_G3_INT_ACK:
ni_660x_register = G3InterruptAcknowledge; ni_660x_register = G3InterruptAcknowledge;
break; break;
case NITIO_G0_Status_Reg: case NITIO_G0_STATUS:
ni_660x_register = G0StatusRegister; ni_660x_register = G0StatusRegister;
break; break;
case NITIO_G1_Status_Reg: case NITIO_G1_STATUS:
ni_660x_register = G1StatusRegister; ni_660x_register = G1StatusRegister;
break; break;
case NITIO_G2_Status_Reg: case NITIO_G2_STATUS:
ni_660x_register = G2StatusRegister; ni_660x_register = G2StatusRegister;
break; break;
case NITIO_G3_Status_Reg: case NITIO_G3_STATUS:
ni_660x_register = G3StatusRegister; ni_660x_register = G3StatusRegister;
break; break;
case NITIO_G0_Interrupt_Enable_Reg: case NITIO_G0_INT_ENA:
ni_660x_register = G0InterruptEnable; ni_660x_register = G0InterruptEnable;
break; break;
case NITIO_G1_Interrupt_Enable_Reg: case NITIO_G1_INT_ENA:
ni_660x_register = G1InterruptEnable; ni_660x_register = G1InterruptEnable;
break; break;
case NITIO_G2_Interrupt_Enable_Reg: case NITIO_G2_INT_ENA:
ni_660x_register = G2InterruptEnable; ni_660x_register = G2InterruptEnable;
break; break;
case NITIO_G3_Interrupt_Enable_Reg: case NITIO_G3_INT_ENA:
ni_660x_register = G3InterruptEnable; ni_660x_register = G3InterruptEnable;
break; break;
default: default:
......
...@@ -3919,82 +3919,82 @@ static unsigned ni_gpct_to_stc_register(enum ni_gpct_register reg) ...@@ -3919,82 +3919,82 @@ static unsigned ni_gpct_to_stc_register(enum ni_gpct_register reg)
{ {
unsigned stc_register; unsigned stc_register;
switch (reg) { switch (reg) {
case NITIO_G0_Autoincrement_Reg: case NITIO_G0_AUTO_INC:
stc_register = G_Autoincrement_Register(0); stc_register = G_Autoincrement_Register(0);
break; break;
case NITIO_G1_Autoincrement_Reg: case NITIO_G1_AUTO_INC:
stc_register = G_Autoincrement_Register(1); stc_register = G_Autoincrement_Register(1);
break; break;
case NITIO_G0_Command_Reg: case NITIO_G0_CMD:
stc_register = G_Command_Register(0); stc_register = G_Command_Register(0);
break; break;
case NITIO_G1_Command_Reg: case NITIO_G1_CMD:
stc_register = G_Command_Register(1); stc_register = G_Command_Register(1);
break; break;
case NITIO_G0_HW_Save_Reg: case NITIO_G0_HW_SAVE:
stc_register = G_HW_Save_Register(0); stc_register = G_HW_Save_Register(0);
break; break;
case NITIO_G1_HW_Save_Reg: case NITIO_G1_HW_SAVE:
stc_register = G_HW_Save_Register(1); stc_register = G_HW_Save_Register(1);
break; break;
case NITIO_G0_SW_Save_Reg: case NITIO_G0_SW_SAVE:
stc_register = G_Save_Register(0); stc_register = G_Save_Register(0);
break; break;
case NITIO_G1_SW_Save_Reg: case NITIO_G1_SW_SAVE:
stc_register = G_Save_Register(1); stc_register = G_Save_Register(1);
break; break;
case NITIO_G0_Mode_Reg: case NITIO_G0_MODE:
stc_register = G_Mode_Register(0); stc_register = G_Mode_Register(0);
break; break;
case NITIO_G1_Mode_Reg: case NITIO_G1_MODE:
stc_register = G_Mode_Register(1); stc_register = G_Mode_Register(1);
break; break;
case NITIO_G0_LoadA_Reg: case NITIO_G0_LOADA:
stc_register = G_Load_A_Register(0); stc_register = G_Load_A_Register(0);
break; break;
case NITIO_G1_LoadA_Reg: case NITIO_G1_LOADA:
stc_register = G_Load_A_Register(1); stc_register = G_Load_A_Register(1);
break; break;
case NITIO_G0_LoadB_Reg: case NITIO_G0_LOADB:
stc_register = G_Load_B_Register(0); stc_register = G_Load_B_Register(0);
break; break;
case NITIO_G1_LoadB_Reg: case NITIO_G1_LOADB:
stc_register = G_Load_B_Register(1); stc_register = G_Load_B_Register(1);
break; break;
case NITIO_G0_Input_Select_Reg: case NITIO_G0_INPUT_SEL:
stc_register = G_Input_Select_Register(0); stc_register = G_Input_Select_Register(0);
break; break;
case NITIO_G1_Input_Select_Reg: case NITIO_G1_INPUT_SEL:
stc_register = G_Input_Select_Register(1); stc_register = G_Input_Select_Register(1);
break; break;
case NITIO_G01_Status_Reg: case NITIO_G01_STATUS:
stc_register = G_Status_Register; stc_register = G_Status_Register;
break; break;
case NITIO_G01_Joint_Reset_Reg: case NITIO_G01_RESET:
stc_register = Joint_Reset_Register; stc_register = Joint_Reset_Register;
break; break;
case NITIO_G01_Joint_Status1_Reg: case NITIO_G01_STATUS1:
stc_register = Joint_Status_1_Register; stc_register = Joint_Status_1_Register;
break; break;
case NITIO_G01_Joint_Status2_Reg: case NITIO_G01_STATUS2:
stc_register = Joint_Status_2_Register; stc_register = Joint_Status_2_Register;
break; break;
case NITIO_G0_Interrupt_Acknowledge_Reg: case NITIO_G0_INT_ACK:
stc_register = Interrupt_A_Ack_Register; stc_register = Interrupt_A_Ack_Register;
break; break;
case NITIO_G1_Interrupt_Acknowledge_Reg: case NITIO_G1_INT_ACK:
stc_register = Interrupt_B_Ack_Register; stc_register = Interrupt_B_Ack_Register;
break; break;
case NITIO_G0_Status_Reg: case NITIO_G0_STATUS:
stc_register = AI_Status_1_Register; stc_register = AI_Status_1_Register;
break; break;
case NITIO_G1_Status_Reg: case NITIO_G1_STATUS:
stc_register = AO_Status_1_Register; stc_register = AO_Status_1_Register;
break; break;
case NITIO_G0_Interrupt_Enable_Reg: case NITIO_G0_INT_ENA:
stc_register = Interrupt_A_Enable_Register; stc_register = Interrupt_A_Enable_Register;
break; break;
case NITIO_G1_Interrupt_Enable_Reg: case NITIO_G1_INT_ENA:
stc_register = Interrupt_B_Enable_Register; stc_register = Interrupt_B_Enable_Register;
break; break;
default: default:
...@@ -4022,52 +4022,52 @@ static void ni_gpct_write_register(struct ni_gpct *counter, unsigned bits, ...@@ -4022,52 +4022,52 @@ static void ni_gpct_write_register(struct ni_gpct *counter, unsigned bits,
switch (reg) { switch (reg) {
/* m-series-only registers */ /* m-series-only registers */
case NITIO_G0_Counting_Mode_Reg: case NITIO_G0_CNT_MODE:
ni_writew(bits, M_Offset_G0_Counting_Mode); ni_writew(bits, M_Offset_G0_Counting_Mode);
break; break;
case NITIO_G1_Counting_Mode_Reg: case NITIO_G1_CNT_MODE:
ni_writew(bits, M_Offset_G1_Counting_Mode); ni_writew(bits, M_Offset_G1_Counting_Mode);
break; break;
case NITIO_G0_Second_Gate_Reg: case NITIO_G0_GATE2:
ni_writew(bits, M_Offset_G0_Second_Gate); ni_writew(bits, M_Offset_G0_Second_Gate);
break; break;
case NITIO_G1_Second_Gate_Reg: case NITIO_G1_GATE2:
ni_writew(bits, M_Offset_G1_Second_Gate); ni_writew(bits, M_Offset_G1_Second_Gate);
break; break;
case NITIO_G0_DMA_Config_Reg: case NITIO_G0_DMA_CFG:
ni_writew(bits, M_Offset_G0_DMA_Config); ni_writew(bits, M_Offset_G0_DMA_Config);
break; break;
case NITIO_G1_DMA_Config_Reg: case NITIO_G1_DMA_CFG:
ni_writew(bits, M_Offset_G1_DMA_Config); ni_writew(bits, M_Offset_G1_DMA_Config);
break; break;
case NITIO_G0_ABZ_Reg: case NITIO_G0_ABZ:
ni_writew(bits, M_Offset_G0_MSeries_ABZ); ni_writew(bits, M_Offset_G0_MSeries_ABZ);
break; break;
case NITIO_G1_ABZ_Reg: case NITIO_G1_ABZ:
ni_writew(bits, M_Offset_G1_MSeries_ABZ); ni_writew(bits, M_Offset_G1_MSeries_ABZ);
break; break;
/* 32 bit registers */ /* 32 bit registers */
case NITIO_G0_LoadA_Reg: case NITIO_G0_LOADA:
case NITIO_G1_LoadA_Reg: case NITIO_G1_LOADA:
case NITIO_G0_LoadB_Reg: case NITIO_G0_LOADB:
case NITIO_G1_LoadB_Reg: case NITIO_G1_LOADB:
stc_register = ni_gpct_to_stc_register(reg); stc_register = ni_gpct_to_stc_register(reg);
devpriv->stc_writel(dev, bits, stc_register); devpriv->stc_writel(dev, bits, stc_register);
break; break;
/* 16 bit registers */ /* 16 bit registers */
case NITIO_G0_Interrupt_Enable_Reg: case NITIO_G0_INT_ENA:
BUG_ON(bits & ~gpct_interrupt_a_enable_mask); BUG_ON(bits & ~gpct_interrupt_a_enable_mask);
ni_set_bitfield(dev, Interrupt_A_Enable_Register, ni_set_bitfield(dev, Interrupt_A_Enable_Register,
gpct_interrupt_a_enable_mask, bits); gpct_interrupt_a_enable_mask, bits);
break; break;
case NITIO_G1_Interrupt_Enable_Reg: case NITIO_G1_INT_ENA:
BUG_ON(bits & ~gpct_interrupt_b_enable_mask); BUG_ON(bits & ~gpct_interrupt_b_enable_mask);
ni_set_bitfield(dev, Interrupt_B_Enable_Register, ni_set_bitfield(dev, Interrupt_B_Enable_Register,
gpct_interrupt_b_enable_mask, bits); gpct_interrupt_b_enable_mask, bits);
break; break;
case NITIO_G01_Joint_Reset_Reg: case NITIO_G01_RESET:
BUG_ON(bits & ~gpct_joint_reset_mask); BUG_ON(bits & ~gpct_joint_reset_mask);
/* fall-through */ /* fall-through */
default: default:
...@@ -4085,21 +4085,18 @@ static unsigned ni_gpct_read_register(struct ni_gpct *counter, ...@@ -4085,21 +4085,18 @@ static unsigned ni_gpct_read_register(struct ni_gpct *counter,
switch (reg) { switch (reg) {
/* m-series only registers */ /* m-series only registers */
case NITIO_G0_DMA_Status_Reg: case NITIO_G0_DMA_STATUS:
return ni_readw(M_Offset_G0_DMA_Status); return ni_readw(M_Offset_G0_DMA_Status);
break; case NITIO_G1_DMA_STATUS:
case NITIO_G1_DMA_Status_Reg:
return ni_readw(M_Offset_G1_DMA_Status); return ni_readw(M_Offset_G1_DMA_Status);
break;
/* 32 bit registers */ /* 32 bit registers */
case NITIO_G0_HW_Save_Reg: case NITIO_G0_HW_SAVE:
case NITIO_G1_HW_Save_Reg: case NITIO_G1_HW_SAVE:
case NITIO_G0_SW_Save_Reg: case NITIO_G0_SW_SAVE:
case NITIO_G1_SW_Save_Reg: case NITIO_G1_SW_SAVE:
stc_register = ni_gpct_to_stc_register(reg); stc_register = ni_gpct_to_stc_register(reg);
return devpriv->stc_readl(dev, stc_register); return devpriv->stc_readl(dev, stc_register);
break;
/* 16 bit registers */ /* 16 bit registers */
default: default:
......
...@@ -25,77 +25,77 @@ struct mite_struct; ...@@ -25,77 +25,77 @@ struct mite_struct;
struct ni_gpct_device; struct ni_gpct_device;
enum ni_gpct_register { enum ni_gpct_register {
NITIO_G0_Autoincrement_Reg, NITIO_G0_AUTO_INC,
NITIO_G1_Autoincrement_Reg, NITIO_G1_AUTO_INC,
NITIO_G2_Autoincrement_Reg, NITIO_G2_AUTO_INC,
NITIO_G3_Autoincrement_Reg, NITIO_G3_AUTO_INC,
NITIO_G0_Command_Reg, NITIO_G0_CMD,
NITIO_G1_Command_Reg, NITIO_G1_CMD,
NITIO_G2_Command_Reg, NITIO_G2_CMD,
NITIO_G3_Command_Reg, NITIO_G3_CMD,
NITIO_G0_HW_Save_Reg, NITIO_G0_HW_SAVE,
NITIO_G1_HW_Save_Reg, NITIO_G1_HW_SAVE,
NITIO_G2_HW_Save_Reg, NITIO_G2_HW_SAVE,
NITIO_G3_HW_Save_Reg, NITIO_G3_HW_SAVE,
NITIO_G0_SW_Save_Reg, NITIO_G0_SW_SAVE,
NITIO_G1_SW_Save_Reg, NITIO_G1_SW_SAVE,
NITIO_G2_SW_Save_Reg, NITIO_G2_SW_SAVE,
NITIO_G3_SW_Save_Reg, NITIO_G3_SW_SAVE,
NITIO_G0_Mode_Reg, NITIO_G0_MODE,
NITIO_G1_Mode_Reg, NITIO_G1_MODE,
NITIO_G2_Mode_Reg, NITIO_G2_MODE,
NITIO_G3_Mode_Reg, NITIO_G3_MODE,
NITIO_G0_LoadA_Reg, NITIO_G0_LOADA,
NITIO_G1_LoadA_Reg, NITIO_G1_LOADA,
NITIO_G2_LoadA_Reg, NITIO_G2_LOADA,
NITIO_G3_LoadA_Reg, NITIO_G3_LOADA,
NITIO_G0_LoadB_Reg, NITIO_G0_LOADB,
NITIO_G1_LoadB_Reg, NITIO_G1_LOADB,
NITIO_G2_LoadB_Reg, NITIO_G2_LOADB,
NITIO_G3_LoadB_Reg, NITIO_G3_LOADB,
NITIO_G0_Input_Select_Reg, NITIO_G0_INPUT_SEL,
NITIO_G1_Input_Select_Reg, NITIO_G1_INPUT_SEL,
NITIO_G2_Input_Select_Reg, NITIO_G2_INPUT_SEL,
NITIO_G3_Input_Select_Reg, NITIO_G3_INPUT_SEL,
NITIO_G0_Counting_Mode_Reg, NITIO_G0_CNT_MODE,
NITIO_G1_Counting_Mode_Reg, NITIO_G1_CNT_MODE,
NITIO_G2_Counting_Mode_Reg, NITIO_G2_CNT_MODE,
NITIO_G3_Counting_Mode_Reg, NITIO_G3_CNT_MODE,
NITIO_G0_Second_Gate_Reg, NITIO_G0_GATE2,
NITIO_G1_Second_Gate_Reg, NITIO_G1_GATE2,
NITIO_G2_Second_Gate_Reg, NITIO_G2_GATE2,
NITIO_G3_Second_Gate_Reg, NITIO_G3_GATE2,
NITIO_G01_Status_Reg, NITIO_G01_STATUS,
NITIO_G23_Status_Reg, NITIO_G23_STATUS,
NITIO_G01_Joint_Reset_Reg, NITIO_G01_RESET,
NITIO_G23_Joint_Reset_Reg, NITIO_G23_RESET,
NITIO_G01_Joint_Status1_Reg, NITIO_G01_STATUS1,
NITIO_G23_Joint_Status1_Reg, NITIO_G23_STATUS1,
NITIO_G01_Joint_Status2_Reg, NITIO_G01_STATUS2,
NITIO_G23_Joint_Status2_Reg, NITIO_G23_STATUS2,
NITIO_G0_DMA_Config_Reg, NITIO_G0_DMA_CFG,
NITIO_G1_DMA_Config_Reg, NITIO_G1_DMA_CFG,
NITIO_G2_DMA_Config_Reg, NITIO_G2_DMA_CFG,
NITIO_G3_DMA_Config_Reg, NITIO_G3_DMA_CFG,
NITIO_G0_DMA_Status_Reg, NITIO_G0_DMA_STATUS,
NITIO_G1_DMA_Status_Reg, NITIO_G1_DMA_STATUS,
NITIO_G2_DMA_Status_Reg, NITIO_G2_DMA_STATUS,
NITIO_G3_DMA_Status_Reg, NITIO_G3_DMA_STATUS,
NITIO_G0_ABZ_Reg, NITIO_G0_ABZ,
NITIO_G1_ABZ_Reg, NITIO_G1_ABZ,
NITIO_G0_Interrupt_Acknowledge_Reg, NITIO_G0_INT_ACK,
NITIO_G1_Interrupt_Acknowledge_Reg, NITIO_G1_INT_ACK,
NITIO_G2_Interrupt_Acknowledge_Reg, NITIO_G2_INT_ACK,
NITIO_G3_Interrupt_Acknowledge_Reg, NITIO_G3_INT_ACK,
NITIO_G0_Status_Reg, NITIO_G0_STATUS,
NITIO_G1_Status_Reg, NITIO_G1_STATUS,
NITIO_G2_Status_Reg, NITIO_G2_STATUS,
NITIO_G3_Status_Reg, NITIO_G3_STATUS,
NITIO_G0_Interrupt_Enable_Reg, NITIO_G0_INT_ENA,
NITIO_G1_Interrupt_Enable_Reg, NITIO_G1_INT_ENA,
NITIO_G2_Interrupt_Enable_Reg, NITIO_G2_INT_ENA,
NITIO_G3_Interrupt_Enable_Reg, NITIO_G3_INT_ENA,
NITIO_Num_Registers, NITIO_NUM_REGS,
}; };
enum ni_gpct_variant { enum ni_gpct_variant {
...@@ -122,7 +122,7 @@ struct ni_gpct_device { ...@@ -122,7 +122,7 @@ struct ni_gpct_device {
enum ni_gpct_variant variant; enum ni_gpct_variant variant;
struct ni_gpct *counters; struct ni_gpct *counters;
unsigned num_counters; unsigned num_counters;
unsigned regs[NITIO_Num_Registers]; unsigned regs[NITIO_NUM_REGS];
spinlock_t regs_lock; spinlock_t regs_lock;
}; };
......
...@@ -21,406 +21,275 @@ ...@@ -21,406 +21,275 @@
#include "ni_tio.h" #include "ni_tio.h"
static inline enum ni_gpct_register NITIO_Gi_Autoincrement_Reg(unsigned static inline enum ni_gpct_register NITIO_Gi_Autoincrement_Reg(unsigned idx)
counter_index)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
return NITIO_G0_Autoincrement_Reg; return NITIO_G0_AUTO_INC;
break;
case 1: case 1:
return NITIO_G1_Autoincrement_Reg; return NITIO_G1_AUTO_INC;
break;
case 2: case 2:
return NITIO_G2_Autoincrement_Reg; return NITIO_G2_AUTO_INC;
break;
case 3: case 3:
return NITIO_G3_Autoincrement_Reg; return NITIO_G3_AUTO_INC;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gi_Command_Reg(unsigned counter_index) static inline enum ni_gpct_register NITIO_Gi_Command_Reg(unsigned idx)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
return NITIO_G0_Command_Reg; return NITIO_G0_CMD;
break;
case 1: case 1:
return NITIO_G1_Command_Reg; return NITIO_G1_CMD;
break;
case 2: case 2:
return NITIO_G2_Command_Reg; return NITIO_G2_CMD;
break;
case 3: case 3:
return NITIO_G3_Command_Reg; return NITIO_G3_CMD;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gi_Counting_Mode_Reg(unsigned static inline enum ni_gpct_register NITIO_Gi_Counting_Mode_Reg(unsigned idx)
counter_index)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
return NITIO_G0_Counting_Mode_Reg; return NITIO_G0_CNT_MODE;
break;
case 1: case 1:
return NITIO_G1_Counting_Mode_Reg; return NITIO_G1_CNT_MODE;
break;
case 2: case 2:
return NITIO_G2_Counting_Mode_Reg; return NITIO_G2_CNT_MODE;
break;
case 3: case 3:
return NITIO_G3_Counting_Mode_Reg; return NITIO_G3_CNT_MODE;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gi_Input_Select_Reg(unsigned static inline enum ni_gpct_register NITIO_Gi_Input_Select_Reg(unsigned idx)
counter_index)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
return NITIO_G0_Input_Select_Reg; return NITIO_G0_INPUT_SEL;
break;
case 1: case 1:
return NITIO_G1_Input_Select_Reg; return NITIO_G1_INPUT_SEL;
break;
case 2: case 2:
return NITIO_G2_Input_Select_Reg; return NITIO_G2_INPUT_SEL;
break;
case 3: case 3:
return NITIO_G3_Input_Select_Reg; return NITIO_G3_INPUT_SEL;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gxx_Joint_Reset_Reg(unsigned static inline enum ni_gpct_register NITIO_Gxx_Joint_Reset_Reg(unsigned idx)
counter_index)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
case 1: case 1:
return NITIO_G01_Joint_Reset_Reg; return NITIO_G01_RESET;
break;
case 2: case 2:
case 3: case 3:
return NITIO_G23_Joint_Reset_Reg; return NITIO_G23_RESET;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gxx_Joint_Status1_Reg(unsigned static inline enum ni_gpct_register NITIO_Gxx_Joint_Status1_Reg(unsigned idx)
counter_index)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
case 1: case 1:
return NITIO_G01_Joint_Status1_Reg; return NITIO_G01_STATUS1;
break;
case 2: case 2:
case 3: case 3:
return NITIO_G23_Joint_Status1_Reg; return NITIO_G23_STATUS1;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gxx_Joint_Status2_Reg(unsigned static inline enum ni_gpct_register NITIO_Gxx_Joint_Status2_Reg(unsigned idx)
counter_index)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
case 1: case 1:
return NITIO_G01_Joint_Status2_Reg; return NITIO_G01_STATUS2;
break;
case 2: case 2:
case 3: case 3:
return NITIO_G23_Joint_Status2_Reg; return NITIO_G23_STATUS2;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gxx_Status_Reg(unsigned counter_index) static inline enum ni_gpct_register NITIO_Gxx_Status_Reg(unsigned idx)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
case 1: case 1:
return NITIO_G01_Status_Reg; return NITIO_G01_STATUS;
break;
case 2: case 2:
case 3: case 3:
return NITIO_G23_Status_Reg; return NITIO_G23_STATUS;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gi_LoadA_Reg(unsigned counter_index) static inline enum ni_gpct_register NITIO_Gi_LoadA_Reg(unsigned idx)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
return NITIO_G0_LoadA_Reg; return NITIO_G0_LOADA;
break;
case 1: case 1:
return NITIO_G1_LoadA_Reg; return NITIO_G1_LOADA;
break;
case 2: case 2:
return NITIO_G2_LoadA_Reg; return NITIO_G2_LOADA;
break;
case 3: case 3:
return NITIO_G3_LoadA_Reg; return NITIO_G3_LOADA;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gi_LoadB_Reg(unsigned counter_index) static inline enum ni_gpct_register NITIO_Gi_LoadB_Reg(unsigned idx)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
return NITIO_G0_LoadB_Reg; return NITIO_G0_LOADB;
break;
case 1: case 1:
return NITIO_G1_LoadB_Reg; return NITIO_G1_LOADB;
break;
case 2: case 2:
return NITIO_G2_LoadB_Reg; return NITIO_G2_LOADB;
break;
case 3: case 3:
return NITIO_G3_LoadB_Reg; return NITIO_G3_LOADB;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gi_Mode_Reg(unsigned counter_index) static inline enum ni_gpct_register NITIO_Gi_Mode_Reg(unsigned idx)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
return NITIO_G0_Mode_Reg; return NITIO_G0_MODE;
break;
case 1: case 1:
return NITIO_G1_Mode_Reg; return NITIO_G1_MODE;
break;
case 2: case 2:
return NITIO_G2_Mode_Reg; return NITIO_G2_MODE;
break;
case 3: case 3:
return NITIO_G3_Mode_Reg; return NITIO_G3_MODE;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gi_SW_Save_Reg(int counter_index) static inline enum ni_gpct_register NITIO_Gi_SW_Save_Reg(int idx)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
return NITIO_G0_SW_Save_Reg; return NITIO_G0_SW_SAVE;
break;
case 1: case 1:
return NITIO_G1_SW_Save_Reg; return NITIO_G1_SW_SAVE;
break;
case 2: case 2:
return NITIO_G2_SW_Save_Reg; return NITIO_G2_SW_SAVE;
break;
case 3: case 3:
return NITIO_G3_SW_Save_Reg; return NITIO_G3_SW_SAVE;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gi_Second_Gate_Reg(int counter_index) static inline enum ni_gpct_register NITIO_Gi_Second_Gate_Reg(unsigned idx)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
return NITIO_G0_Second_Gate_Reg; return NITIO_G0_GATE2;
break;
case 1: case 1:
return NITIO_G1_Second_Gate_Reg; return NITIO_G1_GATE2;
break;
case 2: case 2:
return NITIO_G2_Second_Gate_Reg; return NITIO_G2_GATE2;
break;
case 3: case 3:
return NITIO_G3_Second_Gate_Reg; return NITIO_G3_GATE2;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gi_DMA_Config_Reg(int counter_index) static inline enum ni_gpct_register NITIO_Gi_DMA_Config_Reg(unsigned idx)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
return NITIO_G0_DMA_Config_Reg; return NITIO_G0_DMA_CFG;
break;
case 1: case 1:
return NITIO_G1_DMA_Config_Reg; return NITIO_G1_DMA_CFG;
break;
case 2: case 2:
return NITIO_G2_DMA_Config_Reg; return NITIO_G2_DMA_CFG;
break;
case 3: case 3:
return NITIO_G3_DMA_Config_Reg; return NITIO_G3_DMA_CFG;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gi_DMA_Status_Reg(int counter_index) static inline enum ni_gpct_register NITIO_Gi_DMA_Status_Reg(unsigned idx)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
return NITIO_G0_DMA_Status_Reg; return NITIO_G0_DMA_STATUS;
break;
case 1: case 1:
return NITIO_G1_DMA_Status_Reg; return NITIO_G1_DMA_STATUS;
break;
case 2: case 2:
return NITIO_G2_DMA_Status_Reg; return NITIO_G2_DMA_STATUS;
break;
case 3: case 3:
return NITIO_G3_DMA_Status_Reg; return NITIO_G3_DMA_STATUS;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gi_ABZ_Reg(int counter_index) static inline enum ni_gpct_register NITIO_Gi_ABZ_Reg(unsigned idx)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
return NITIO_G0_ABZ_Reg; return NITIO_G0_ABZ;
break;
case 1: case 1:
return NITIO_G1_ABZ_Reg; return NITIO_G1_ABZ;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gi_Interrupt_Acknowledge_Reg( static inline enum ni_gpct_register NITIO_Gi_Interrupt_Acknowledge_Reg(unsigned idx)
int counter_index)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
return NITIO_G0_Interrupt_Acknowledge_Reg; return NITIO_G0_INT_ACK;
break;
case 1: case 1:
return NITIO_G1_Interrupt_Acknowledge_Reg; return NITIO_G1_INT_ACK;
break;
case 2: case 2:
return NITIO_G2_Interrupt_Acknowledge_Reg; return NITIO_G2_INT_ACK;
break;
case 3: case 3:
return NITIO_G3_Interrupt_Acknowledge_Reg; return NITIO_G3_INT_ACK;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gi_Status_Reg(int counter_index) static inline enum ni_gpct_register NITIO_Gi_Status_Reg(unsigned idx)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
return NITIO_G0_Status_Reg; return NITIO_G0_STATUS;
break;
case 1: case 1:
return NITIO_G1_Status_Reg; return NITIO_G1_STATUS;
break;
case 2: case 2:
return NITIO_G2_Status_Reg; return NITIO_G2_STATUS;
break;
case 3: case 3:
return NITIO_G3_Status_Reg; return NITIO_G3_STATUS;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
static inline enum ni_gpct_register NITIO_Gi_Interrupt_Enable_Reg( static inline enum ni_gpct_register NITIO_Gi_Interrupt_Enable_Reg(unsigned idx)
int counter_index)
{ {
switch (counter_index) { switch (idx) {
case 0: case 0:
return NITIO_G0_Interrupt_Enable_Reg; return NITIO_G0_INT_ENA;
break;
case 1: case 1:
return NITIO_G1_Interrupt_Enable_Reg; return NITIO_G1_INT_ENA;
break;
case 2: case 2:
return NITIO_G2_Interrupt_Enable_Reg; return NITIO_G2_INT_ENA;
break;
case 3: case 3:
return NITIO_G3_Interrupt_Enable_Reg; return NITIO_G3_INT_ENA;
break;
default:
BUG();
break;
} }
return 0; return 0;
} }
...@@ -699,14 +568,14 @@ static inline unsigned Gi_Gate_Interrupt_Enable_Bit(unsigned counter_index) ...@@ -699,14 +568,14 @@ static inline unsigned Gi_Gate_Interrupt_Enable_Bit(unsigned counter_index)
static inline void write_register(struct ni_gpct *counter, unsigned bits, static inline void write_register(struct ni_gpct *counter, unsigned bits,
enum ni_gpct_register reg) enum ni_gpct_register reg)
{ {
BUG_ON(reg >= NITIO_Num_Registers); BUG_ON(reg >= NITIO_NUM_REGS);
counter->counter_dev->write_register(counter, bits, reg); counter->counter_dev->write_register(counter, bits, reg);
} }
static inline unsigned read_register(struct ni_gpct *counter, static inline unsigned read_register(struct ni_gpct *counter,
enum ni_gpct_register reg) enum ni_gpct_register reg)
{ {
BUG_ON(reg >= NITIO_Num_Registers); BUG_ON(reg >= NITIO_NUM_REGS);
return counter->counter_dev->read_register(counter, reg); return counter->counter_dev->read_register(counter, reg);
} }
...@@ -738,7 +607,7 @@ static inline void ni_tio_set_bits_transient(struct ni_gpct *counter, ...@@ -738,7 +607,7 @@ static inline void ni_tio_set_bits_transient(struct ni_gpct *counter,
struct ni_gpct_device *counter_dev = counter->counter_dev; struct ni_gpct_device *counter_dev = counter->counter_dev;
unsigned long flags; unsigned long flags;
BUG_ON(register_index >= NITIO_Num_Registers); BUG_ON(register_index >= NITIO_NUM_REGS);
spin_lock_irqsave(&counter_dev->regs_lock, flags); spin_lock_irqsave(&counter_dev->regs_lock, flags);
counter_dev->regs[register_index] &= ~bit_mask; counter_dev->regs[register_index] &= ~bit_mask;
counter_dev->regs[register_index] |= (bit_values & bit_mask); counter_dev->regs[register_index] |= (bit_values & bit_mask);
...@@ -773,7 +642,7 @@ static inline unsigned ni_tio_get_soft_copy(const struct ni_gpct *counter, ...@@ -773,7 +642,7 @@ static inline unsigned ni_tio_get_soft_copy(const struct ni_gpct *counter,
unsigned long flags; unsigned long flags;
unsigned value; unsigned value;
BUG_ON(register_index >= NITIO_Num_Registers); BUG_ON(register_index >= NITIO_NUM_REGS);
spin_lock_irqsave(&counter_dev->regs_lock, flags); spin_lock_irqsave(&counter_dev->regs_lock, flags);
value = counter_dev->regs[register_index]; value = counter_dev->regs[register_index];
spin_unlock_irqrestore(&counter_dev->regs_lock, flags); spin_unlock_irqrestore(&counter_dev->regs_lock, flags);
......
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