Commit 12de44f5 authored by Fabio Estevam's avatar Fabio Estevam Committed by Shawn Guo

ARM: dts: imx: Fix Ethernet PHY reset polarity

The FEC driver ignores the GPIO polarity from 'phy-reset-gpios' and
considers that the Ethernet PHY is active low, unless the
property 'phy-reset-active-high' is present.

Fix the device tree description by explicitly passing the
'GPIO_ACTIVE_LOW' flag to the 'phy-reset-gpios' property.
Signed-off-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 37de44f2
......@@ -97,7 +97,7 @@ &uart1 {
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-reset-gpios = <&gpio3 7 0>;
phy-reset-gpios = <&gpio3 7 GPIO_ACTIVE_LOW>;
phy-mode = "rmii";
phy-supply = <&reg_fec_phy>;
status = "okay";
......
......@@ -125,7 +125,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-supply = <&reg_fec_3v3>;
phy-reset-gpios = <&gpio4 8 0>;
phy-reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
status = "okay";
};
......
......@@ -9,6 +9,7 @@
* http://www.gnu.org/copyleft/gpl.html
*/
#include <dt-bindings/gpio/gpio.h>
#include "imx25-pinfunc.h"
/ {
......
......@@ -64,7 +64,7 @@ mac0: ethernet@800f0000 {
pinctrl-names = "default";
pinctrl-0 = <&mac0_pins_a
&mac0_pins_cfa10037>;
phy-reset-gpios = <&gpio2 21 0>;
phy-reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
phy-reset-duration = <100>;
status = "okay";
};
......
......@@ -327,7 +327,7 @@ mac0: ethernet@800f0000 {
pinctrl-names = "default";
pinctrl-0 = <&mac0_pins_a
&mac0_pins_cfa10049>;
phy-reset-gpios = <&gpio2 21 0>;
phy-reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
phy-reset-duration = <100>;
status = "okay";
};
......
......@@ -162,7 +162,7 @@ mac0: ethernet@800f0000 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&mac0_pins_a>;
phy-reset-gpios = <&gpio2 21 0>;
phy-reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
phy-reset-duration = <100>;
status = "okay";
};
......
......@@ -129,7 +129,7 @@ mac0: ethernet@800f0000 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&mac0_pins_a>;
phy-reset-gpios = <&gpio2 21 0>;
phy-reset-gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
phy-reset-duration = <100>;
status = "okay";
};
......
......@@ -31,7 +31,7 @@ &mac1 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&mac1_pins_a>;
phy-reset-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>;
phy-reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>;
status = "okay";
};
......
......@@ -262,7 +262,7 @@ mac0: ethernet@800f0000 {
pinctrl-names = "default";
pinctrl-0 = <&mac0_pins_a>;
phy-supply = <&reg_fec_3v3>;
phy-reset-gpios = <&gpio4 13 0>;
phy-reset-gpios = <&gpio4 13 GPIO_ACTIVE_LOW>;
phy-reset-duration = <100>;
status = "okay";
};
......
......@@ -188,7 +188,7 @@ mac0: ethernet@800f0000 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&mac0_pins_a>;
phy-reset-gpios = <&gpio4 13 0>;
phy-reset-gpios = <&gpio4 13 GPIO_ACTIVE_LOW>;
phy-reset-duration = <100>;
status = "okay";
};
......
......@@ -53,7 +53,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio4 12 0>;
phy-reset-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
status = "okay";
};
......
......@@ -12,6 +12,7 @@
*/
#include "imx50-pinfunc.h"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/imx5-clock.h>
/ {
......
......@@ -36,7 +36,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "mii";
phy-reset-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
phy-reset-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
phy-reset-duration = <1>;
status = "okay";
};
......
......@@ -195,7 +195,7 @@ sensor2: lm75@49 {
};
&fec {
phy-reset-gpios = <&gpio7 6 0>;
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
......
......@@ -344,7 +344,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 0>;
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
......
......@@ -273,6 +273,6 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 0>;
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
......@@ -201,7 +201,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
phy-handle = <&phy0>;
mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */
status = "okay";
......
......@@ -137,7 +137,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio4 2 0>;
phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
status = "okay";
};
......
......@@ -94,7 +94,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 31 0>;
phy-reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
fsl,err006687-workaround-present;
......
......@@ -118,7 +118,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio1 25 0>;
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
phy-supply = <&vgen2_1v2_eth>;
status = "okay";
};
......
......@@ -135,7 +135,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio1 25 0>;
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
fsl,err006687-workaround-present;
......
......@@ -153,7 +153,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
status = "okay";
};
......
......@@ -217,7 +217,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet_novena>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
rxc-skew-ps = <3000>;
rxdv-skew-ps = <0>;
txc-skew-ps = <3000>;
......
......@@ -118,7 +118,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
status = "okay";
};
......
......@@ -320,7 +320,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio7 18 GPIO_ACTIVE_HIGH>;
phy-reset-gpios = <&gpio7 18 GPIO_ACTIVE_LOW>;
txd0-skew-ps = <0>;
txd1-skew-ps = <0>;
txd2-skew-ps = <0>;
......
......@@ -46,7 +46,7 @@ &fec {
pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
phy-mode = "rgmii";
phy-reset-duration = <2>;
phy-reset-gpios = <&gpio4 15 0>;
phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
status = "okay";
};
......
......@@ -271,7 +271,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio1 27 0>;
phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
txen-skew-ps = <0>;
txc-skew-ps = <3000>;
rxdv-skew-ps = <0>;
......
......@@ -178,7 +178,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio1 25 0>;
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
status = "okay";
};
......
......@@ -248,7 +248,7 @@ &fec {
<&clks IMX6QDL_CLK_ENET_REF>;
clock-names = "ipg", "ahb", "ptp", "enet_out";
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
phy-handle = <&etnphy>;
phy-supply = <&reg_3v3_etn>;
status = "okay";
......
......@@ -209,7 +209,7 @@ &fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
phy-reset-gpios = <&gpio3 29 0>;
phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
fsl,err006687-workaround-present;
......
......@@ -78,7 +78,7 @@ &fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2 &pinctrl_enet2_mdio &pinctrl_etnphy1_rst>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
phy-reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
phy-supply = <&reg_3v3_etn>;
phy-handle = <&etnphy1>;
status = "okay";
......
......@@ -307,7 +307,7 @@ &fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1 &pinctrl_enet1_mdio &pinctrl_etnphy0_rst>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_HIGH>;
phy-reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
phy-supply = <&reg_3v3_etn>;
phy-handle = <&etnphy0>;
status = "okay";
......@@ -342,7 +342,7 @@ &fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2 &pinctrl_etnphy1_rst>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
phy-reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
phy-supply = <&reg_3v3_etn>;
phy-handle = <&etnphy1>;
status = "disabled";
......
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