Commit 138e4e16 authored by Alex Deucher's avatar Alex Deucher

drm/radeon/kms: move ucode defines to a separate header

Avoids confusion and duplication.
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 29a15221
...@@ -33,9 +33,7 @@ ...@@ -33,9 +33,7 @@
#include "avivod.h" #include "avivod.h"
#include "evergreen_reg.h" #include "evergreen_reg.h"
#include "evergreen_blit_shaders.h" #include "evergreen_blit_shaders.h"
#include "radeon_ucode.h"
#define EVERGREEN_PFP_UCODE_SIZE 1120
#define EVERGREEN_PM4_UCODE_SIZE 1376
static const u32 crtc_offsets[6] = static const u32 crtc_offsets[6] =
{ {
......
...@@ -33,6 +33,7 @@ ...@@ -33,6 +33,7 @@
#include "atom.h" #include "atom.h"
#include "ni_reg.h" #include "ni_reg.h"
#include "cayman_blit_shaders.h" #include "cayman_blit_shaders.h"
#include "radeon_ucode.h"
extern bool evergreen_is_display_hung(struct radeon_device *rdev); extern bool evergreen_is_display_hung(struct radeon_device *rdev);
extern void evergreen_print_gpu_status_regs(struct radeon_device *rdev); extern void evergreen_print_gpu_status_regs(struct radeon_device *rdev);
...@@ -47,18 +48,6 @@ extern void evergreen_pcie_gen2_enable(struct radeon_device *rdev); ...@@ -47,18 +48,6 @@ extern void evergreen_pcie_gen2_enable(struct radeon_device *rdev);
extern void si_rlc_fini(struct radeon_device *rdev); extern void si_rlc_fini(struct radeon_device *rdev);
extern int si_rlc_init(struct radeon_device *rdev); extern int si_rlc_init(struct radeon_device *rdev);
#define EVERGREEN_PFP_UCODE_SIZE 1120
#define EVERGREEN_PM4_UCODE_SIZE 1376
#define EVERGREEN_RLC_UCODE_SIZE 768
#define BTC_MC_UCODE_SIZE 6024
#define CAYMAN_PFP_UCODE_SIZE 2176
#define CAYMAN_PM4_UCODE_SIZE 2176
#define CAYMAN_RLC_UCODE_SIZE 1024
#define CAYMAN_MC_UCODE_SIZE 6037
#define ARUBA_RLC_UCODE_SIZE 1536
/* Firmware Names */ /* Firmware Names */
MODULE_FIRMWARE("radeon/BARTS_pfp.bin"); MODULE_FIRMWARE("radeon/BARTS_pfp.bin");
MODULE_FIRMWARE("radeon/BARTS_me.bin"); MODULE_FIRMWARE("radeon/BARTS_me.bin");
......
...@@ -38,18 +38,7 @@ ...@@ -38,18 +38,7 @@
#include "r600d.h" #include "r600d.h"
#include "atom.h" #include "atom.h"
#include "avivod.h" #include "avivod.h"
#include "radeon_ucode.h"
#define PFP_UCODE_SIZE 576
#define PM4_UCODE_SIZE 1792
#define RLC_UCODE_SIZE 768
#define R700_PFP_UCODE_SIZE 848
#define R700_PM4_UCODE_SIZE 1360
#define R700_RLC_UCODE_SIZE 1024
#define EVERGREEN_PFP_UCODE_SIZE 1120
#define EVERGREEN_PM4_UCODE_SIZE 1376
#define EVERGREEN_RLC_UCODE_SIZE 768
#define CAYMAN_RLC_UCODE_SIZE 1024
#define ARUBA_RLC_UCODE_SIZE 1536
/* Firmware Names */ /* Firmware Names */
MODULE_FIRMWARE("radeon/R600_pfp.bin"); MODULE_FIRMWARE("radeon/R600_pfp.bin");
...@@ -2246,9 +2235,9 @@ int r600_init_microcode(struct radeon_device *rdev) ...@@ -2246,9 +2235,9 @@ int r600_init_microcode(struct radeon_device *rdev)
me_req_size = R700_PM4_UCODE_SIZE * 4; me_req_size = R700_PM4_UCODE_SIZE * 4;
rlc_req_size = R700_RLC_UCODE_SIZE * 4; rlc_req_size = R700_RLC_UCODE_SIZE * 4;
} else { } else {
pfp_req_size = PFP_UCODE_SIZE * 4; pfp_req_size = R600_PFP_UCODE_SIZE * 4;
me_req_size = PM4_UCODE_SIZE * 12; me_req_size = R600_PM4_UCODE_SIZE * 12;
rlc_req_size = RLC_UCODE_SIZE * 4; rlc_req_size = R600_RLC_UCODE_SIZE * 4;
} }
DRM_INFO("Loading %s Microcode\n", chip_name); DRM_INFO("Loading %s Microcode\n", chip_name);
...@@ -2331,13 +2320,13 @@ static int r600_cp_load_microcode(struct radeon_device *rdev) ...@@ -2331,13 +2320,13 @@ static int r600_cp_load_microcode(struct radeon_device *rdev)
fw_data = (const __be32 *)rdev->me_fw->data; fw_data = (const __be32 *)rdev->me_fw->data;
WREG32(CP_ME_RAM_WADDR, 0); WREG32(CP_ME_RAM_WADDR, 0);
for (i = 0; i < PM4_UCODE_SIZE * 3; i++) for (i = 0; i < R600_PM4_UCODE_SIZE * 3; i++)
WREG32(CP_ME_RAM_DATA, WREG32(CP_ME_RAM_DATA,
be32_to_cpup(fw_data++)); be32_to_cpup(fw_data++));
fw_data = (const __be32 *)rdev->pfp_fw->data; fw_data = (const __be32 *)rdev->pfp_fw->data;
WREG32(CP_PFP_UCODE_ADDR, 0); WREG32(CP_PFP_UCODE_ADDR, 0);
for (i = 0; i < PFP_UCODE_SIZE; i++) for (i = 0; i < R600_PFP_UCODE_SIZE; i++)
WREG32(CP_PFP_UCODE_DATA, WREG32(CP_PFP_UCODE_DATA,
be32_to_cpup(fw_data++)); be32_to_cpup(fw_data++));
...@@ -3839,7 +3828,7 @@ static int r600_rlc_init(struct radeon_device *rdev) ...@@ -3839,7 +3828,7 @@ static int r600_rlc_init(struct radeon_device *rdev)
WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++)); WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));
} }
} else { } else {
for (i = 0; i < RLC_UCODE_SIZE; i++) { for (i = 0; i < R600_RLC_UCODE_SIZE; i++) {
WREG32(RLC_UCODE_ADDR, i); WREG32(RLC_UCODE_ADDR, i);
WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++)); WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));
} }
......
/*
* Copyright 2012 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __RADEON_UCODE_H__
#define __RADEON_UCODE_H__
/* CP */
#define R600_PFP_UCODE_SIZE 576
#define R600_PM4_UCODE_SIZE 1792
#define R700_PFP_UCODE_SIZE 848
#define R700_PM4_UCODE_SIZE 1360
#define EVERGREEN_PFP_UCODE_SIZE 1120
#define EVERGREEN_PM4_UCODE_SIZE 1376
#define CAYMAN_PFP_UCODE_SIZE 2176
#define CAYMAN_PM4_UCODE_SIZE 2176
/* RLC */
#define R600_RLC_UCODE_SIZE 768
#define R700_RLC_UCODE_SIZE 1024
#define EVERGREEN_RLC_UCODE_SIZE 768
#define CAYMAN_RLC_UCODE_SIZE 1024
#define ARUBA_RLC_UCODE_SIZE 1536
/* MC */
#define BTC_MC_UCODE_SIZE 6024
#define CAYMAN_MC_UCODE_SIZE 6037
#endif
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