Commit 13aa7e0b authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'for-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata

Pull libata changes from Tejun Heo:
 "Nothing too interesting.  Only two minor fixes in libata core.  Most
  changes are specific to hardware which isn't too common"

* 'for-3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata:
  ahci: Add Device IDs for Intel Wildcat Point-LP
  sata_rcar: Convert to clk_prepare/unprepare
  drivers/libata: Set max sector to 65535 for Slimtype DVD A DS8A9SH drive
  libata: Add some missing command descriptions
  sata_highbank: clear whole array in highbank_initialize_phys()
  ahci: disabled FBS prior to issuing software reset
  libata: Fix display of sata speed
  ahci: imx: setup power saving methods
  ata_piix: minor typo and a printk fix
  ahci: Changing two module params with static and __read_mostly
parents c08acff0 9f961a5f
...@@ -292,6 +292,10 @@ static const struct pci_device_id ahci_pci_tbl[] = { ...@@ -292,6 +292,10 @@ static const struct pci_device_id ahci_pci_tbl[] = {
{ PCI_VDEVICE(INTEL, 0x8d66), board_ahci }, /* Wellsburg RAID */ { PCI_VDEVICE(INTEL, 0x8d66), board_ahci }, /* Wellsburg RAID */
{ PCI_VDEVICE(INTEL, 0x8d6e), board_ahci }, /* Wellsburg RAID */ { PCI_VDEVICE(INTEL, 0x8d6e), board_ahci }, /* Wellsburg RAID */
{ PCI_VDEVICE(INTEL, 0x23a3), board_ahci }, /* Coleto Creek AHCI */ { PCI_VDEVICE(INTEL, 0x23a3), board_ahci }, /* Coleto Creek AHCI */
{ PCI_VDEVICE(INTEL, 0x9c83), board_ahci }, /* Wildcat Point-LP AHCI */
{ PCI_VDEVICE(INTEL, 0x9c85), board_ahci }, /* Wildcat Point-LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c87), board_ahci }, /* Wildcat Point-LP RAID */
{ PCI_VDEVICE(INTEL, 0x9c8f), board_ahci }, /* Wildcat Point-LP RAID */
/* JMicron 360/1/3/5/6, match class to avoid IDE function */ /* JMicron 360/1/3/5/6, match class to avoid IDE function */
{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
......
...@@ -339,6 +339,7 @@ extern struct device_attribute *ahci_sdev_attrs[]; ...@@ -339,6 +339,7 @@ extern struct device_attribute *ahci_sdev_attrs[];
.sdev_attrs = ahci_sdev_attrs .sdev_attrs = ahci_sdev_attrs
extern struct ata_port_operations ahci_ops; extern struct ata_port_operations ahci_ops;
extern struct ata_port_operations ahci_platform_ops;
extern struct ata_port_operations ahci_pmp_retry_srst_ops; extern struct ata_port_operations ahci_pmp_retry_srst_ops;
unsigned int ahci_dev_classify(struct ata_port *ap); unsigned int ahci_dev_classify(struct ata_port *ap);
...@@ -368,6 +369,7 @@ irqreturn_t ahci_hw_interrupt(int irq, void *dev_instance); ...@@ -368,6 +369,7 @@ irqreturn_t ahci_hw_interrupt(int irq, void *dev_instance);
irqreturn_t ahci_thread_fn(int irq, void *dev_instance); irqreturn_t ahci_thread_fn(int irq, void *dev_instance);
void ahci_print_info(struct ata_host *host, const char *scc_s); void ahci_print_info(struct ata_host *host, const char *scc_s);
int ahci_host_activate(struct ata_host *host, int irq, unsigned int n_msis); int ahci_host_activate(struct ata_host *host, int irq, unsigned int n_msis);
void ahci_error_handler(struct ata_port *ap);
static inline void __iomem *__ahci_port_base(struct ata_host *host, static inline void __iomem *__ahci_port_base(struct ata_host *host,
unsigned int port_no) unsigned int port_no)
......
/* /*
* copyright (c) 2013 Freescale Semiconductor, Inc.
* Freescale IMX AHCI SATA platform driver * Freescale IMX AHCI SATA platform driver
* Copyright 2013 Freescale Semiconductor, Inc.
* *
* based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov * based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov
* *
...@@ -25,10 +25,13 @@ ...@@ -25,10 +25,13 @@
#include <linux/of_device.h> #include <linux/of_device.h>
#include <linux/mfd/syscon.h> #include <linux/mfd/syscon.h>
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
#include <linux/libata.h>
#include "ahci.h" #include "ahci.h"
enum { enum {
HOST_TIMER1MS = 0xe0, /* Timer 1-ms */ PORT_PHY_CTL = 0x178, /* Port0 PHY Control */
PORT_PHY_CTL_PDDQ_LOC = 0x100000, /* PORT_PHY_CTL bits */
HOST_TIMER1MS = 0xe0, /* Timer 1-ms */
}; };
struct imx_ahci_priv { struct imx_ahci_priv {
...@@ -36,6 +39,56 @@ struct imx_ahci_priv { ...@@ -36,6 +39,56 @@ struct imx_ahci_priv {
struct clk *sata_ref_clk; struct clk *sata_ref_clk;
struct clk *ahb_clk; struct clk *ahb_clk;
struct regmap *gpr; struct regmap *gpr;
bool no_device;
bool first_time;
};
static int ahci_imx_hotplug;
module_param_named(hotplug, ahci_imx_hotplug, int, 0644);
MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 1=support)");
static void ahci_imx_error_handler(struct ata_port *ap)
{
u32 reg_val;
struct ata_device *dev;
struct ata_host *host = dev_get_drvdata(ap->dev);
struct ahci_host_priv *hpriv = host->private_data;
void __iomem *mmio = hpriv->mmio;
struct imx_ahci_priv *imxpriv = dev_get_drvdata(ap->dev->parent);
ahci_error_handler(ap);
if (!(imxpriv->first_time) || ahci_imx_hotplug)
return;
imxpriv->first_time = false;
ata_for_each_dev(dev, &ap->link, ENABLED)
return;
/*
* Disable link to save power. An imx ahci port can't be recovered
* without full reset once the pddq mode is enabled making it
* impossible to use as part of libata LPM.
*/
reg_val = readl(mmio + PORT_PHY_CTL);
writel(reg_val | PORT_PHY_CTL_PDDQ_LOC, mmio + PORT_PHY_CTL);
regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
IMX6Q_GPR13_SATA_MPLL_CLK_EN,
!IMX6Q_GPR13_SATA_MPLL_CLK_EN);
clk_disable_unprepare(imxpriv->sata_ref_clk);
imxpriv->no_device = true;
}
static struct ata_port_operations ahci_imx_ops = {
.inherits = &ahci_platform_ops,
.error_handler = ahci_imx_error_handler,
};
static const struct ata_port_info ahci_imx_port_info = {
.flags = AHCI_FLAG_COMMON,
.pio_mask = ATA_PIO4,
.udma_mask = ATA_UDMA6,
.port_ops = &ahci_imx_ops,
}; };
static int imx6q_sata_init(struct device *dev, void __iomem *mmio) static int imx6q_sata_init(struct device *dev, void __iomem *mmio)
...@@ -117,9 +170,51 @@ static void imx6q_sata_exit(struct device *dev) ...@@ -117,9 +170,51 @@ static void imx6q_sata_exit(struct device *dev)
clk_disable_unprepare(imxpriv->sata_ref_clk); clk_disable_unprepare(imxpriv->sata_ref_clk);
} }
static int imx_ahci_suspend(struct device *dev)
{
struct imx_ahci_priv *imxpriv = dev_get_drvdata(dev->parent);
/*
* If no_device is set, The CLKs had been gated off in the
* initialization so don't do it again here.
*/
if (!imxpriv->no_device) {
regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
IMX6Q_GPR13_SATA_MPLL_CLK_EN,
!IMX6Q_GPR13_SATA_MPLL_CLK_EN);
clk_disable_unprepare(imxpriv->sata_ref_clk);
}
return 0;
}
static int imx_ahci_resume(struct device *dev)
{
struct imx_ahci_priv *imxpriv = dev_get_drvdata(dev->parent);
int ret;
if (!imxpriv->no_device) {
ret = clk_prepare_enable(imxpriv->sata_ref_clk);
if (ret < 0) {
dev_err(dev, "pre-enable sata_ref clock err:%d\n", ret);
return ret;
}
regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
IMX6Q_GPR13_SATA_MPLL_CLK_EN,
IMX6Q_GPR13_SATA_MPLL_CLK_EN);
usleep_range(1000, 2000);
}
return 0;
}
static struct ahci_platform_data imx6q_sata_pdata = { static struct ahci_platform_data imx6q_sata_pdata = {
.init = imx6q_sata_init, .init = imx6q_sata_init,
.exit = imx6q_sata_exit, .exit = imx6q_sata_exit,
.ata_port_info = &ahci_imx_port_info,
.suspend = imx_ahci_suspend,
.resume = imx_ahci_resume,
}; };
static const struct of_device_id imx_ahci_of_match[] = { static const struct of_device_id imx_ahci_of_match[] = {
...@@ -152,6 +247,8 @@ static int imx_ahci_probe(struct platform_device *pdev) ...@@ -152,6 +247,8 @@ static int imx_ahci_probe(struct platform_device *pdev)
ahci_dev = &ahci_pdev->dev; ahci_dev = &ahci_pdev->dev;
ahci_dev->parent = dev; ahci_dev->parent = dev;
imxpriv->no_device = false;
imxpriv->first_time = true;
imxpriv->ahb_clk = devm_clk_get(dev, "ahb"); imxpriv->ahb_clk = devm_clk_get(dev, "ahb");
if (IS_ERR(imxpriv->ahb_clk)) { if (IS_ERR(imxpriv->ahb_clk)) {
dev_err(dev, "can't get ahb clock.\n"); dev_err(dev, "can't get ahb clock.\n");
......
...@@ -49,10 +49,11 @@ static struct platform_device_id ahci_devtype[] = { ...@@ -49,10 +49,11 @@ static struct platform_device_id ahci_devtype[] = {
}; };
MODULE_DEVICE_TABLE(platform, ahci_devtype); MODULE_DEVICE_TABLE(platform, ahci_devtype);
static struct ata_port_operations ahci_platform_ops = { struct ata_port_operations ahci_platform_ops = {
.inherits = &ahci_ops, .inherits = &ahci_ops,
.host_stop = ahci_host_stop, .host_stop = ahci_host_stop,
}; };
EXPORT_SYMBOL_GPL(ahci_platform_ops);
static struct ata_port_operations ahci_platform_retry_srst_ops = { static struct ata_port_operations ahci_platform_retry_srst_ops = {
.inherits = &ahci_pmp_retry_srst_ops, .inherits = &ahci_pmp_retry_srst_ops,
......
...@@ -100,7 +100,7 @@ ...@@ -100,7 +100,7 @@
enum { enum {
PIIX_IOCFG = 0x54, /* IDE I/O configuration register */ PIIX_IOCFG = 0x54, /* IDE I/O configuration register */
ICH5_PMR = 0x90, /* port mapping register */ ICH5_PMR = 0x90, /* address map register */
ICH5_PCS = 0x92, /* port control and status */ ICH5_PCS = 0x92, /* port control and status */
PIIX_SIDPR_BAR = 5, PIIX_SIDPR_BAR = 5,
PIIX_SIDPR_LEN = 16, PIIX_SIDPR_LEN = 16,
...@@ -233,7 +233,7 @@ static const struct pci_device_id piix_pci_tbl[] = { ...@@ -233,7 +233,7 @@ static const struct pci_device_id piix_pci_tbl[] = {
PCI_CLASS_STORAGE_IDE << 8, 0xffff00, ich6m_sata }, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, ich6m_sata },
/* 82801GB/GR/GH (ICH7, identical to ICH6) */ /* 82801GB/GR/GH (ICH7, identical to ICH6) */
{ 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata }, { 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
/* 2801GBM/GHM (ICH7M, identical to ICH6M) */ /* 82801GBM/GHM (ICH7M, identical to ICH6M) */
{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata }, { 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata },
/* Enterprise Southbridge 2 (631xESB/632xESB) */ /* Enterprise Southbridge 2 (631xESB/632xESB) */
{ 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata }, { 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata },
...@@ -517,7 +517,7 @@ static int ich_pata_cable_detect(struct ata_port *ap) ...@@ -517,7 +517,7 @@ static int ich_pata_cable_detect(struct ata_port *ap)
const struct ich_laptop *lap = &ich_laptop[0]; const struct ich_laptop *lap = &ich_laptop[0];
u8 mask; u8 mask;
/* Check for specials - Acer Aspire 5602WLMi */ /* Check for specials */
while (lap->device) { while (lap->device) {
if (lap->device == pdev->device && if (lap->device == pdev->device &&
lap->subvendor == pdev->subsystem_vendor && lap->subvendor == pdev->subsystem_vendor &&
...@@ -1366,38 +1366,39 @@ static const int *piix_init_sata_map(struct pci_dev *pdev, ...@@ -1366,38 +1366,39 @@ static const int *piix_init_sata_map(struct pci_dev *pdev,
const int *map; const int *map;
int i, invalid_map = 0; int i, invalid_map = 0;
u8 map_value; u8 map_value;
char buf[32];
char *p = buf, *end = buf + sizeof(buf);
pci_read_config_byte(pdev, ICH5_PMR, &map_value); pci_read_config_byte(pdev, ICH5_PMR, &map_value);
map = map_db->map[map_value & map_db->mask]; map = map_db->map[map_value & map_db->mask];
dev_info(&pdev->dev, "MAP [");
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
switch (map[i]) { switch (map[i]) {
case RV: case RV:
invalid_map = 1; invalid_map = 1;
pr_cont(" XX"); p += scnprintf(p, end - p, " XX");
break; break;
case NA: case NA:
pr_cont(" --"); p += scnprintf(p, end - p, " --");
break; break;
case IDE: case IDE:
WARN_ON((i & 1) || map[i + 1] != IDE); WARN_ON((i & 1) || map[i + 1] != IDE);
pinfo[i / 2] = piix_port_info[ich_pata_100]; pinfo[i / 2] = piix_port_info[ich_pata_100];
i++; i++;
pr_cont(" IDE IDE"); p += scnprintf(p, end - p, " IDE IDE");
break; break;
default: default:
pr_cont(" P%d", map[i]); p += scnprintf(p, end - p, " P%d", map[i]);
if (i & 1) if (i & 1)
pinfo[i / 2].flags |= ATA_FLAG_SLAVE_POSS; pinfo[i / 2].flags |= ATA_FLAG_SLAVE_POSS;
break; break;
} }
} }
pr_cont(" ]\n"); dev_info(&pdev->dev, "MAP [%s ]\n", buf);
if (invalid_map) if (invalid_map)
dev_err(&pdev->dev, "invalid MAP value %u\n", map_value); dev_err(&pdev->dev, "invalid MAP value %u\n", map_value);
......
...@@ -89,7 +89,6 @@ static int ahci_pmp_retry_softreset(struct ata_link *link, unsigned int *class, ...@@ -89,7 +89,6 @@ static int ahci_pmp_retry_softreset(struct ata_link *link, unsigned int *class,
static int ahci_hardreset(struct ata_link *link, unsigned int *class, static int ahci_hardreset(struct ata_link *link, unsigned int *class,
unsigned long deadline); unsigned long deadline);
static void ahci_postreset(struct ata_link *link, unsigned int *class); static void ahci_postreset(struct ata_link *link, unsigned int *class);
static void ahci_error_handler(struct ata_port *ap);
static void ahci_post_internal_cmd(struct ata_queued_cmd *qc); static void ahci_post_internal_cmd(struct ata_queued_cmd *qc);
static void ahci_dev_config(struct ata_device *dev); static void ahci_dev_config(struct ata_device *dev);
#ifdef CONFIG_PM #ifdef CONFIG_PM
...@@ -189,14 +188,15 @@ struct ata_port_operations ahci_pmp_retry_srst_ops = { ...@@ -189,14 +188,15 @@ struct ata_port_operations ahci_pmp_retry_srst_ops = {
}; };
EXPORT_SYMBOL_GPL(ahci_pmp_retry_srst_ops); EXPORT_SYMBOL_GPL(ahci_pmp_retry_srst_ops);
int ahci_em_messages = 1; static bool ahci_em_messages __read_mostly = true;
EXPORT_SYMBOL_GPL(ahci_em_messages); EXPORT_SYMBOL_GPL(ahci_em_messages);
module_param(ahci_em_messages, int, 0444); module_param(ahci_em_messages, bool, 0444);
/* add other LED protocol types when they become supported */ /* add other LED protocol types when they become supported */
MODULE_PARM_DESC(ahci_em_messages, MODULE_PARM_DESC(ahci_em_messages,
"AHCI Enclosure Management Message control (0 = off, 1 = on)"); "AHCI Enclosure Management Message control (0 = off, 1 = on)");
int devslp_idle_timeout = 1000; /* device sleep idle timeout in ms */ /* device sleep idle timeout in ms */
static int devslp_idle_timeout __read_mostly = 1000;
module_param(devslp_idle_timeout, int, 0644); module_param(devslp_idle_timeout, int, 0644);
MODULE_PARM_DESC(devslp_idle_timeout, "device sleep idle timeout"); MODULE_PARM_DESC(devslp_idle_timeout, "device sleep idle timeout");
...@@ -1275,9 +1275,11 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class, ...@@ -1275,9 +1275,11 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class,
{ {
struct ata_port *ap = link->ap; struct ata_port *ap = link->ap;
struct ahci_host_priv *hpriv = ap->host->private_data; struct ahci_host_priv *hpriv = ap->host->private_data;
struct ahci_port_priv *pp = ap->private_data;
const char *reason = NULL; const char *reason = NULL;
unsigned long now, msecs; unsigned long now, msecs;
struct ata_taskfile tf; struct ata_taskfile tf;
bool fbs_disabled = false;
int rc; int rc;
DPRINTK("ENTER\n"); DPRINTK("ENTER\n");
...@@ -1287,6 +1289,16 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class, ...@@ -1287,6 +1289,16 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class,
if (rc && rc != -EOPNOTSUPP) if (rc && rc != -EOPNOTSUPP)
ata_link_warn(link, "failed to reset engine (errno=%d)\n", rc); ata_link_warn(link, "failed to reset engine (errno=%d)\n", rc);
/*
* According to AHCI-1.2 9.3.9: if FBS is enable, software shall
* clear PxFBS.EN to '0' prior to issuing software reset to devices
* that is attached to port multiplier.
*/
if (!ata_is_host_link(link) && pp->fbs_enabled) {
ahci_disable_fbs(ap);
fbs_disabled = true;
}
ata_tf_init(link->device, &tf); ata_tf_init(link->device, &tf);
/* issue the first D2H Register FIS */ /* issue the first D2H Register FIS */
...@@ -1327,6 +1339,10 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class, ...@@ -1327,6 +1339,10 @@ int ahci_do_softreset(struct ata_link *link, unsigned int *class,
} else } else
*class = ahci_dev_classify(ap); *class = ahci_dev_classify(ap);
/* re-enable FBS if disabled before */
if (fbs_disabled)
ahci_enable_fbs(ap);
DPRINTK("EXIT, class=%u\n", *class); DPRINTK("EXIT, class=%u\n", *class);
return 0; return 0;
...@@ -1989,7 +2005,7 @@ static void ahci_thaw(struct ata_port *ap) ...@@ -1989,7 +2005,7 @@ static void ahci_thaw(struct ata_port *ap)
writel(pp->intr_mask, port_mmio + PORT_IRQ_MASK); writel(pp->intr_mask, port_mmio + PORT_IRQ_MASK);
} }
static void ahci_error_handler(struct ata_port *ap) void ahci_error_handler(struct ata_port *ap)
{ {
if (!(ap->pflags & ATA_PFLAG_FROZEN)) { if (!(ap->pflags & ATA_PFLAG_FROZEN)) {
/* restart engine */ /* restart engine */
...@@ -2002,6 +2018,7 @@ static void ahci_error_handler(struct ata_port *ap) ...@@ -2002,6 +2018,7 @@ static void ahci_error_handler(struct ata_port *ap)
if (!ata_dev_enabled(ap->link.device)) if (!ata_dev_enabled(ap->link.device))
ahci_stop_engine(ap); ahci_stop_engine(ap);
} }
EXPORT_SYMBOL_GPL(ahci_error_handler);
static void ahci_post_internal_cmd(struct ata_queued_cmd *qc) static void ahci_post_internal_cmd(struct ata_queued_cmd *qc)
{ {
......
...@@ -4126,6 +4126,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = { ...@@ -4126,6 +4126,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
{ "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 }, { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
{ "QUANTUM DAT DAT72-000", NULL, ATA_HORKAGE_ATAPI_MOD16_DMA }, { "QUANTUM DAT DAT72-000", NULL, ATA_HORKAGE_ATAPI_MOD16_DMA },
{ "Slimtype DVD A DS8A8SH", NULL, ATA_HORKAGE_MAX_SEC_LBA48 }, { "Slimtype DVD A DS8A8SH", NULL, ATA_HORKAGE_MAX_SEC_LBA48 },
{ "Slimtype DVD A DS8A9SH", NULL, ATA_HORKAGE_MAX_SEC_LBA48 },
/* Devices we expect to fail diagnostics */ /* Devices we expect to fail diagnostics */
......
...@@ -2293,6 +2293,7 @@ const char *ata_get_cmd_descript(u8 command) ...@@ -2293,6 +2293,7 @@ const char *ata_get_cmd_descript(u8 command)
{ ATA_CMD_IDLE, "IDLE" }, { ATA_CMD_IDLE, "IDLE" },
{ ATA_CMD_EDD, "EXECUTE DEVICE DIAGNOSTIC" }, { ATA_CMD_EDD, "EXECUTE DEVICE DIAGNOSTIC" },
{ ATA_CMD_DOWNLOAD_MICRO, "DOWNLOAD MICROCODE" }, { ATA_CMD_DOWNLOAD_MICRO, "DOWNLOAD MICROCODE" },
{ ATA_CMD_DOWNLOAD_MICRO_DMA, "DOWNLOAD MICROCODE DMA" },
{ ATA_CMD_NOP, "NOP" }, { ATA_CMD_NOP, "NOP" },
{ ATA_CMD_FLUSH, "FLUSH CACHE" }, { ATA_CMD_FLUSH, "FLUSH CACHE" },
{ ATA_CMD_FLUSH_EXT, "FLUSH CACHE EXT" }, { ATA_CMD_FLUSH_EXT, "FLUSH CACHE EXT" },
...@@ -2313,6 +2314,8 @@ const char *ata_get_cmd_descript(u8 command) ...@@ -2313,6 +2314,8 @@ const char *ata_get_cmd_descript(u8 command)
{ ATA_CMD_WRITE_QUEUED_FUA_EXT, "WRITE DMA QUEUED FUA EXT" }, { ATA_CMD_WRITE_QUEUED_FUA_EXT, "WRITE DMA QUEUED FUA EXT" },
{ ATA_CMD_FPDMA_READ, "READ FPDMA QUEUED" }, { ATA_CMD_FPDMA_READ, "READ FPDMA QUEUED" },
{ ATA_CMD_FPDMA_WRITE, "WRITE FPDMA QUEUED" }, { ATA_CMD_FPDMA_WRITE, "WRITE FPDMA QUEUED" },
{ ATA_CMD_FPDMA_SEND, "SEND FPDMA QUEUED" },
{ ATA_CMD_FPDMA_RECV, "RECEIVE FPDMA QUEUED" },
{ ATA_CMD_PIO_READ, "READ SECTOR(S)" }, { ATA_CMD_PIO_READ, "READ SECTOR(S)" },
{ ATA_CMD_PIO_READ_EXT, "READ SECTOR(S) EXT" }, { ATA_CMD_PIO_READ_EXT, "READ SECTOR(S) EXT" },
{ ATA_CMD_PIO_WRITE, "WRITE SECTOR(S)" }, { ATA_CMD_PIO_WRITE, "WRITE SECTOR(S)" },
...@@ -2339,12 +2342,15 @@ const char *ata_get_cmd_descript(u8 command) ...@@ -2339,12 +2342,15 @@ const char *ata_get_cmd_descript(u8 command)
{ ATA_CMD_WRITE_LOG_EXT, "WRITE LOG EXT" }, { ATA_CMD_WRITE_LOG_EXT, "WRITE LOG EXT" },
{ ATA_CMD_READ_LOG_DMA_EXT, "READ LOG DMA EXT" }, { ATA_CMD_READ_LOG_DMA_EXT, "READ LOG DMA EXT" },
{ ATA_CMD_WRITE_LOG_DMA_EXT, "WRITE LOG DMA EXT" }, { ATA_CMD_WRITE_LOG_DMA_EXT, "WRITE LOG DMA EXT" },
{ ATA_CMD_TRUSTED_NONDATA, "TRUSTED NON-DATA" },
{ ATA_CMD_TRUSTED_RCV, "TRUSTED RECEIVE" }, { ATA_CMD_TRUSTED_RCV, "TRUSTED RECEIVE" },
{ ATA_CMD_TRUSTED_RCV_DMA, "TRUSTED RECEIVE DMA" }, { ATA_CMD_TRUSTED_RCV_DMA, "TRUSTED RECEIVE DMA" },
{ ATA_CMD_TRUSTED_SND, "TRUSTED SEND" }, { ATA_CMD_TRUSTED_SND, "TRUSTED SEND" },
{ ATA_CMD_TRUSTED_SND_DMA, "TRUSTED SEND DMA" }, { ATA_CMD_TRUSTED_SND_DMA, "TRUSTED SEND DMA" },
{ ATA_CMD_PMP_READ, "READ BUFFER" }, { ATA_CMD_PMP_READ, "READ BUFFER" },
{ ATA_CMD_PMP_READ_DMA, "READ BUFFER DMA" },
{ ATA_CMD_PMP_WRITE, "WRITE BUFFER" }, { ATA_CMD_PMP_WRITE, "WRITE BUFFER" },
{ ATA_CMD_PMP_WRITE_DMA, "WRITE BUFFER DMA" },
{ ATA_CMD_CONF_OVERLAY, "DEVICE CONFIGURATION OVERLAY" }, { ATA_CMD_CONF_OVERLAY, "DEVICE CONFIGURATION OVERLAY" },
{ ATA_CMD_SEC_SET_PASS, "SECURITY SET PASSWORD" }, { ATA_CMD_SEC_SET_PASS, "SECURITY SET PASSWORD" },
{ ATA_CMD_SEC_UNLOCK, "SECURITY UNLOCK" }, { ATA_CMD_SEC_UNLOCK, "SECURITY UNLOCK" },
...@@ -2363,6 +2369,8 @@ const char *ata_get_cmd_descript(u8 command) ...@@ -2363,6 +2369,8 @@ const char *ata_get_cmd_descript(u8 command)
{ ATA_CMD_CFA_TRANS_SECT, "CFA TRANSLATE SECTOR" }, { ATA_CMD_CFA_TRANS_SECT, "CFA TRANSLATE SECTOR" },
{ ATA_CMD_CFA_ERASE, "CFA ERASE SECTORS" }, { ATA_CMD_CFA_ERASE, "CFA ERASE SECTORS" },
{ ATA_CMD_CFA_WRITE_MULT_NE, "CFA WRITE MULTIPLE WITHOUT ERASE" }, { ATA_CMD_CFA_WRITE_MULT_NE, "CFA WRITE MULTIPLE WITHOUT ERASE" },
{ ATA_CMD_REQ_SENSE_DATA, "REQUEST SENSE DATA EXT" },
{ ATA_CMD_SANITIZE_DEVICE, "SANITIZE DEVICE" },
{ ATA_CMD_READ_LONG, "READ LONG (with retries)" }, { ATA_CMD_READ_LONG, "READ LONG (with retries)" },
{ ATA_CMD_READ_LONG_ONCE, "READ LONG (without retries)" }, { ATA_CMD_READ_LONG_ONCE, "READ LONG (without retries)" },
{ ATA_CMD_WRITE_LONG, "WRITE LONG (with retries)" }, { ATA_CMD_WRITE_LONG, "WRITE LONG (with retries)" },
......
...@@ -321,25 +321,25 @@ int ata_tport_add(struct device *parent, ...@@ -321,25 +321,25 @@ int ata_tport_add(struct device *parent,
/* /*
* ATA link attributes * ATA link attributes
*/ */
static int noop(int x) { return x; }
#define ata_link_show_linkspeed(field, format) \
#define ata_link_show_linkspeed(field) \
static ssize_t \ static ssize_t \
show_ata_link_##field(struct device *dev, \ show_ata_link_##field(struct device *dev, \
struct device_attribute *attr, char *buf) \ struct device_attribute *attr, char *buf) \
{ \ { \
struct ata_link *link = transport_class_to_link(dev); \ struct ata_link *link = transport_class_to_link(dev); \
\ \
return sprintf(buf,"%s\n", sata_spd_string(fls(link->field))); \ return sprintf(buf, "%s\n", sata_spd_string(format(link->field))); \
} }
#define ata_link_linkspeed_attr(field) \ #define ata_link_linkspeed_attr(field, format) \
ata_link_show_linkspeed(field) \ ata_link_show_linkspeed(field, format) \
static DEVICE_ATTR(field, S_IRUGO, show_ata_link_##field, NULL) static DEVICE_ATTR(field, S_IRUGO, show_ata_link_##field, NULL)
ata_link_linkspeed_attr(hw_sata_spd_limit); ata_link_linkspeed_attr(hw_sata_spd_limit, fls);
ata_link_linkspeed_attr(sata_spd_limit); ata_link_linkspeed_attr(sata_spd_limit, fls);
ata_link_linkspeed_attr(sata_spd); ata_link_linkspeed_attr(sata_spd, noop);
static DECLARE_TRANSPORT_CLASS(ata_link_class, static DECLARE_TRANSPORT_CLASS(ata_link_class,
......
...@@ -343,13 +343,11 @@ static int highbank_initialize_phys(struct device *dev, void __iomem *addr) ...@@ -343,13 +343,11 @@ static int highbank_initialize_phys(struct device *dev, void __iomem *addr)
{ {
struct device_node *sata_node = dev->of_node; struct device_node *sata_node = dev->of_node;
int phy_count = 0, phy, port = 0, i; int phy_count = 0, phy, port = 0, i;
void __iomem *cphy_base[CPHY_PHY_COUNT]; void __iomem *cphy_base[CPHY_PHY_COUNT] = {};
struct device_node *phy_nodes[CPHY_PHY_COUNT]; struct device_node *phy_nodes[CPHY_PHY_COUNT] = {};
u32 tx_atten[CPHY_PORT_COUNT]; u32 tx_atten[CPHY_PORT_COUNT] = {};
memset(port_data, 0, sizeof(struct phy_lane_info) * CPHY_PORT_COUNT); memset(port_data, 0, sizeof(struct phy_lane_info) * CPHY_PORT_COUNT);
memset(phy_nodes, 0, sizeof(struct device_node*) * CPHY_PHY_COUNT);
memset(tx_atten, 0xff, CPHY_PORT_COUNT);
do { do {
u32 tmp; u32 tmp;
......
...@@ -792,7 +792,7 @@ static int sata_rcar_probe(struct platform_device *pdev) ...@@ -792,7 +792,7 @@ static int sata_rcar_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "failed to get access to sata clock\n"); dev_err(&pdev->dev, "failed to get access to sata clock\n");
return PTR_ERR(priv->clk); return PTR_ERR(priv->clk);
} }
clk_enable(priv->clk); clk_prepare_enable(priv->clk);
host = ata_host_alloc(&pdev->dev, 1); host = ata_host_alloc(&pdev->dev, 1);
if (!host) { if (!host) {
...@@ -822,7 +822,7 @@ static int sata_rcar_probe(struct platform_device *pdev) ...@@ -822,7 +822,7 @@ static int sata_rcar_probe(struct platform_device *pdev)
return 0; return 0;
cleanup: cleanup:
clk_disable(priv->clk); clk_disable_unprepare(priv->clk);
return ret; return ret;
} }
...@@ -841,7 +841,7 @@ static int sata_rcar_remove(struct platform_device *pdev) ...@@ -841,7 +841,7 @@ static int sata_rcar_remove(struct platform_device *pdev)
iowrite32(0, base + SATAINTSTAT_REG); iowrite32(0, base + SATAINTSTAT_REG);
iowrite32(0x7ff, base + SATAINTMASK_REG); iowrite32(0x7ff, base + SATAINTMASK_REG);
clk_disable(priv->clk); clk_disable_unprepare(priv->clk);
return 0; return 0;
} }
...@@ -861,7 +861,7 @@ static int sata_rcar_suspend(struct device *dev) ...@@ -861,7 +861,7 @@ static int sata_rcar_suspend(struct device *dev)
/* mask */ /* mask */
iowrite32(0x7ff, base + SATAINTMASK_REG); iowrite32(0x7ff, base + SATAINTMASK_REG);
clk_disable(priv->clk); clk_disable_unprepare(priv->clk);
} }
return ret; return ret;
...@@ -873,7 +873,7 @@ static int sata_rcar_resume(struct device *dev) ...@@ -873,7 +873,7 @@ static int sata_rcar_resume(struct device *dev)
struct sata_rcar_priv *priv = host->private_data; struct sata_rcar_priv *priv = host->private_data;
void __iomem *base = priv->base; void __iomem *base = priv->base;
clk_enable(priv->clk); clk_prepare_enable(priv->clk);
/* ack and mask */ /* ack and mask */
iowrite32(0, base + SATAINTSTAT_REG); iowrite32(0, base + SATAINTSTAT_REG);
......
...@@ -219,6 +219,7 @@ enum { ...@@ -219,6 +219,7 @@ enum {
ATA_CMD_IDLE = 0xE3, /* place in idle power mode */ ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
ATA_CMD_EDD = 0x90, /* execute device diagnostic */ ATA_CMD_EDD = 0x90, /* execute device diagnostic */
ATA_CMD_DOWNLOAD_MICRO = 0x92, ATA_CMD_DOWNLOAD_MICRO = 0x92,
ATA_CMD_DOWNLOAD_MICRO_DMA = 0x93,
ATA_CMD_NOP = 0x00, ATA_CMD_NOP = 0x00,
ATA_CMD_FLUSH = 0xE7, ATA_CMD_FLUSH = 0xE7,
ATA_CMD_FLUSH_EXT = 0xEA, ATA_CMD_FLUSH_EXT = 0xEA,
...@@ -268,12 +269,15 @@ enum { ...@@ -268,12 +269,15 @@ enum {
ATA_CMD_WRITE_LOG_EXT = 0x3F, ATA_CMD_WRITE_LOG_EXT = 0x3F,
ATA_CMD_READ_LOG_DMA_EXT = 0x47, ATA_CMD_READ_LOG_DMA_EXT = 0x47,
ATA_CMD_WRITE_LOG_DMA_EXT = 0x57, ATA_CMD_WRITE_LOG_DMA_EXT = 0x57,
ATA_CMD_TRUSTED_NONDATA = 0x5B,
ATA_CMD_TRUSTED_RCV = 0x5C, ATA_CMD_TRUSTED_RCV = 0x5C,
ATA_CMD_TRUSTED_RCV_DMA = 0x5D, ATA_CMD_TRUSTED_RCV_DMA = 0x5D,
ATA_CMD_TRUSTED_SND = 0x5E, ATA_CMD_TRUSTED_SND = 0x5E,
ATA_CMD_TRUSTED_SND_DMA = 0x5F, ATA_CMD_TRUSTED_SND_DMA = 0x5F,
ATA_CMD_PMP_READ = 0xE4, ATA_CMD_PMP_READ = 0xE4,
ATA_CMD_PMP_READ_DMA = 0xE9,
ATA_CMD_PMP_WRITE = 0xE8, ATA_CMD_PMP_WRITE = 0xE8,
ATA_CMD_PMP_WRITE_DMA = 0xEB,
ATA_CMD_CONF_OVERLAY = 0xB1, ATA_CMD_CONF_OVERLAY = 0xB1,
ATA_CMD_SEC_SET_PASS = 0xF1, ATA_CMD_SEC_SET_PASS = 0xF1,
ATA_CMD_SEC_UNLOCK = 0xF2, ATA_CMD_SEC_UNLOCK = 0xF2,
...@@ -292,6 +296,9 @@ enum { ...@@ -292,6 +296,9 @@ enum {
ATA_CMD_CFA_TRANS_SECT = 0x87, ATA_CMD_CFA_TRANS_SECT = 0x87,
ATA_CMD_CFA_ERASE = 0xC0, ATA_CMD_CFA_ERASE = 0xC0,
ATA_CMD_CFA_WRITE_MULT_NE = 0xCD, ATA_CMD_CFA_WRITE_MULT_NE = 0xCD,
ATA_CMD_REQ_SENSE_DATA = 0x0B,
ATA_CMD_SANITIZE_DEVICE = 0xB4,
/* marked obsolete in the ATA/ATAPI-7 spec */ /* marked obsolete in the ATA/ATAPI-7 spec */
ATA_CMD_RESTORE = 0x10, ATA_CMD_RESTORE = 0x10,
......
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