Skip to content

L
linux
Commit 14702b3b authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Options

Merge tag 'soc-fixes-5.17-4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM SoC fix from Arnd Bergmann:
 "Here is one last regression fix for 5.17, reverting a patch that went
  into 5.16 as a cleanup that ended up breaking external interrupts on
  Layerscape chips.

  The revert makes it work again, but also reintroduces a build time
  warning about the nonstandard DT binding that will have to be dealt
  with in the future"

* tag 'soc-fixes-5.17-4' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  Revert "arm64: dts: freescale: Fix 'interrupt-map' parent address cells"
parents f76da4d5 1447c635
Show whitespace changes
Inline Side-by-side
Showing with 36 additions and 36 deletions
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
View file @ 14702b3b
...@@ -253,18 +253,18 @@ extirq: interrupt-controller@14 { ...@@ -253,18 +253,18 @@ extirq: interrupt-controller@14 {
interrupt-controller; interrupt-controller;
reg = <0x14 4>; reg = <0x14 4>;
interrupt-map = interrupt-map =
<0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<1 0 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<2 0 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<3 0 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<4 0 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<5 0 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<6 0 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<7 0 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<8 0 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<9 0 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<10 0 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
<11 0 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <0xffffffff 0x0>; interrupt-map-mask = <0xffffffff 0x0>;
}; };
}; };
......
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
View file @ 14702b3b
...@@ -293,18 +293,18 @@ extirq: interrupt-controller@14 { ...@@ -293,18 +293,18 @@ extirq: interrupt-controller@14 {
interrupt-controller; interrupt-controller;
reg = <0x14 4>; reg = <0x14 4>;
interrupt-map = interrupt-map =
<0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<1 0 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<2 0 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<3 0 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<4 0 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<5 0 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<6 0 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<7 0 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<8 0 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<9 0 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<10 0 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
<11 0 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <0xffffffff 0x0>; interrupt-map-mask = <0xffffffff 0x0>;
}; };
}; };
......
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
View file @ 14702b3b
...@@ -680,18 +680,18 @@ extirq: interrupt-controller@14 { ...@@ -680,18 +680,18 @@ extirq: interrupt-controller@14 {
interrupt-controller; interrupt-controller;
reg = <0x14 4>; reg = <0x14 4>;
interrupt-map = interrupt-map =
<0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<1 0 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, <1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<2 0 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, <2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<3 0 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, <3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<4 0 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, <4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
<5 0 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, <5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
<6 0 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, <6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
<7 0 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, <7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
<8 0 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, <8 0 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
<9 0 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, <9 0 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<10 0 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, <10 0 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
<11 0 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; <11 0 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupt-map-mask = <0xffffffff 0x0>; interrupt-map-mask = <0xffffffff 0x0>;
}; };
}; };
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7