Commit 14718b3e authored by Robert Foss's avatar Robert Foss Committed by Wolfram Sang

i2c: qcom: Fix IRQ error misassignement

During cci_isr() errors read from register fields belonging to
i2c master1 are currently assigned to the status field belonging to
i2c master0. This patch corrects this error, and always assigns
master1 errors to the status field of master1.

Fixes: e5175261 ("i2c: Add Qualcomm CCI I2C driver")
Reported-by: default avatarLoic Poulain <loic.poulain@linaro.org>
Suggested-by: default avatarLoic Poulain <loic.poulain@linaro.org>
Signed-off-by: default avatarRobert Foss <robert.foss@linaro.org>
Reviewed-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: default avatarWolfram Sang <wsa@kernel.org>
parent e9acf029
...@@ -194,9 +194,9 @@ static irqreturn_t cci_isr(int irq, void *dev) ...@@ -194,9 +194,9 @@ static irqreturn_t cci_isr(int irq, void *dev)
if (unlikely(val & CCI_IRQ_STATUS_0_I2C_M1_ERROR)) { if (unlikely(val & CCI_IRQ_STATUS_0_I2C_M1_ERROR)) {
if (val & CCI_IRQ_STATUS_0_I2C_M1_Q0_NACK_ERR || if (val & CCI_IRQ_STATUS_0_I2C_M1_Q0_NACK_ERR ||
val & CCI_IRQ_STATUS_0_I2C_M1_Q1_NACK_ERR) val & CCI_IRQ_STATUS_0_I2C_M1_Q1_NACK_ERR)
cci->master[0].status = -ENXIO; cci->master[1].status = -ENXIO;
else else
cci->master[0].status = -EIO; cci->master[1].status = -EIO;
writel(CCI_HALT_REQ_I2C_M1_Q0Q1, cci->base + CCI_HALT_REQ); writel(CCI_HALT_REQ_I2C_M1_Q0Q1, cci->base + CCI_HALT_REQ);
ret = IRQ_HANDLED; ret = IRQ_HANDLED;
......
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