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Commit 15f68479 authored by Steven J. Hill's avatar Steven J. Hill Committed by Ralf Baechle
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MIPS: Octeon: Remove unused L2C types and macros. 

Remove all unused bitfields and macros. Convert the remaining
bitfields to use __BITFIELD_FIELD instead of #ifdef.

[ralf@linux-mips.org: Add inclusions of <uapi/asm/bitfield.h> as necessary.]
Signed-off-by: default avatarSteven J. Hill <steven.hill@cavium.com>
Acked-by: default avatarDavid Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/15403/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 3377e227
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Showing with 305 additions and 3922 deletions
arch/mips/cavium-octeon/executive/cvmx-l2c.c
View file @ 15f68479
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Contact: support@caviumnetworks.com * Contact: support@caviumnetworks.com
* This file is part of the OCTEON SDK * This file is part of the OCTEON SDK
* *
* Copyright (c) 2003-2010 Cavium Networks * Copyright (c) 2003-2017 Cavium, Inc.
* *
* This file is free software; you can redistribute it and/or modify * This file is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, Version 2, as * it under the terms of the GNU General Public License, Version 2, as
...@@ -239,6 +239,7 @@ uint64_t cvmx_l2c_read_perf(uint32_t counter) ...@@ -239,6 +239,7 @@ uint64_t cvmx_l2c_read_perf(uint32_t counter)
else { else {
uint64_t counter = 0; uint64_t counter = 0;
int tad; int tad;
for (tad = 0; tad < CVMX_L2C_TADS; tad++) for (tad = 0; tad < CVMX_L2C_TADS; tad++)
counter += cvmx_read_csr(CVMX_L2C_TADX_PFC0(tad)); counter += cvmx_read_csr(CVMX_L2C_TADX_PFC0(tad));
return counter; return counter;
...@@ -249,6 +250,7 @@ uint64_t cvmx_l2c_read_perf(uint32_t counter) ...@@ -249,6 +250,7 @@ uint64_t cvmx_l2c_read_perf(uint32_t counter)
else { else {
uint64_t counter = 0; uint64_t counter = 0;
int tad; int tad;
for (tad = 0; tad < CVMX_L2C_TADS; tad++) for (tad = 0; tad < CVMX_L2C_TADS; tad++)
counter += cvmx_read_csr(CVMX_L2C_TADX_PFC1(tad)); counter += cvmx_read_csr(CVMX_L2C_TADX_PFC1(tad));
return counter; return counter;
...@@ -259,6 +261,7 @@ uint64_t cvmx_l2c_read_perf(uint32_t counter) ...@@ -259,6 +261,7 @@ uint64_t cvmx_l2c_read_perf(uint32_t counter)
else { else {
uint64_t counter = 0; uint64_t counter = 0;
int tad; int tad;
for (tad = 0; tad < CVMX_L2C_TADS; tad++) for (tad = 0; tad < CVMX_L2C_TADS; tad++)
counter += cvmx_read_csr(CVMX_L2C_TADX_PFC2(tad)); counter += cvmx_read_csr(CVMX_L2C_TADX_PFC2(tad));
return counter; return counter;
...@@ -270,6 +273,7 @@ uint64_t cvmx_l2c_read_perf(uint32_t counter) ...@@ -270,6 +273,7 @@ uint64_t cvmx_l2c_read_perf(uint32_t counter)
else { else {
uint64_t counter = 0; uint64_t counter = 0;
int tad; int tad;
for (tad = 0; tad < CVMX_L2C_TADS; tad++) for (tad = 0; tad < CVMX_L2C_TADS; tad++)
counter += cvmx_read_csr(CVMX_L2C_TADX_PFC3(tad)); counter += cvmx_read_csr(CVMX_L2C_TADX_PFC3(tad));
return counter; return counter;
...@@ -301,7 +305,7 @@ static void fault_in(uint64_t addr, int len) ...@@ -301,7 +305,7 @@ static void fault_in(uint64_t addr, int len)
*/ */
CVMX_DCACHE_INVALIDATE; CVMX_DCACHE_INVALIDATE;
while (len > 0) { while (len > 0) {
ACCESS_ONCE(*ptr); READ_ONCE(*ptr);
len -= CVMX_CACHE_LINE_SIZE; len -= CVMX_CACHE_LINE_SIZE;
ptr += CVMX_CACHE_LINE_SIZE; ptr += CVMX_CACHE_LINE_SIZE;
} }
...@@ -375,7 +379,9 @@ int cvmx_l2c_lock_line(uint64_t addr) ...@@ -375,7 +379,9 @@ int cvmx_l2c_lock_line(uint64_t addr)
if (((union cvmx_l2c_cfg)(cvmx_read_csr(CVMX_L2C_CFG))).s.idxalias) { if (((union cvmx_l2c_cfg)(cvmx_read_csr(CVMX_L2C_CFG))).s.idxalias) {
int alias_shift = CVMX_L2C_IDX_ADDR_SHIFT + 2 * CVMX_L2_SET_BITS - 1; int alias_shift = CVMX_L2C_IDX_ADDR_SHIFT + 2 * CVMX_L2_SET_BITS - 1;
uint64_t addr_tmp = addr ^ (addr & ((1 << alias_shift) - 1)) >> CVMX_L2_SET_BITS; uint64_t addr_tmp = addr ^ (addr & ((1 << alias_shift) - 1)) >> CVMX_L2_SET_BITS;
lckbase.s.lck_base = addr_tmp >> 7; lckbase.s.lck_base = addr_tmp >> 7;
} else { } else {
lckbase.s.lck_base = addr >> 7; lckbase.s.lck_base = addr >> 7;
} }
...@@ -435,6 +441,7 @@ void cvmx_l2c_flush(void) ...@@ -435,6 +441,7 @@ void cvmx_l2c_flush(void)
/* These may look like constants, but they aren't... */ /* These may look like constants, but they aren't... */
int assoc_shift = CVMX_L2C_TAG_ADDR_ALIAS_SHIFT; int assoc_shift = CVMX_L2C_TAG_ADDR_ALIAS_SHIFT;
int set_shift = CVMX_L2C_IDX_ADDR_SHIFT; int set_shift = CVMX_L2C_IDX_ADDR_SHIFT;
for (set = 0; set < n_set; set++) { for (set = 0; set < n_set; set++) {
for (assoc = 0; assoc < n_assoc; assoc++) { for (assoc = 0; assoc < n_assoc; assoc++) {
address = CVMX_ADD_SEG(CVMX_MIPS_SPACE_XKPHYS, address = CVMX_ADD_SEG(CVMX_MIPS_SPACE_XKPHYS,
...@@ -519,89 +526,49 @@ int cvmx_l2c_unlock_mem_region(uint64_t start, uint64_t len) ...@@ -519,89 +526,49 @@ int cvmx_l2c_unlock_mem_region(uint64_t start, uint64_t len)
union __cvmx_l2c_tag { union __cvmx_l2c_tag {
uint64_t u64; uint64_t u64;
struct cvmx_l2c_tag_cn50xx { struct cvmx_l2c_tag_cn50xx {
#ifdef __BIG_ENDIAN_BITFIELD __BITFIELD_FIELD(uint64_t reserved:40,
uint64_t reserved:40; __BITFIELD_FIELD(uint64_t V:1, /* Line valid */
uint64_t V:1; /* Line valid */ __BITFIELD_FIELD(uint64_t D:1, /* Line dirty */
uint64_t D:1; /* Line dirty */ __BITFIELD_FIELD(uint64_t L:1, /* Line locked */
uint64_t L:1; /* Line locked */ __BITFIELD_FIELD(uint64_t U:1, /* Use, LRU eviction */
uint64_t U:1; /* Use, LRU eviction */ __BITFIELD_FIELD(uint64_t addr:20, /* Phys addr (33..14) */
uint64_t addr:20; /* Phys mem addr (33..14) */ ;))))))
#else
uint64_t addr:20; /* Phys mem addr (33..14) */
uint64_t U:1; /* Use, LRU eviction */
uint64_t L:1; /* Line locked */
uint64_t D:1; /* Line dirty */
uint64_t V:1; /* Line valid */
uint64_t reserved:40;
#endif
} cn50xx; } cn50xx;
struct cvmx_l2c_tag_cn30xx { struct cvmx_l2c_tag_cn30xx {
#ifdef __BIG_ENDIAN_BITFIELD __BITFIELD_FIELD(uint64_t reserved:41,
uint64_t reserved:41; __BITFIELD_FIELD(uint64_t V:1, /* Line valid */
uint64_t V:1; /* Line valid */ __BITFIELD_FIELD(uint64_t D:1, /* Line dirty */
uint64_t D:1; /* Line dirty */ __BITFIELD_FIELD(uint64_t L:1, /* Line locked */
uint64_t L:1; /* Line locked */ __BITFIELD_FIELD(uint64_t U:1, /* Use, LRU eviction */
uint64_t U:1; /* Use, LRU eviction */ __BITFIELD_FIELD(uint64_t addr:19, /* Phys addr (33..15) */
uint64_t addr:19; /* Phys mem addr (33..15) */ ;))))))
#else
uint64_t addr:19; /* Phys mem addr (33..15) */
uint64_t U:1; /* Use, LRU eviction */
uint64_t L:1; /* Line locked */
uint64_t D:1; /* Line dirty */
uint64_t V:1; /* Line valid */
uint64_t reserved:41;
#endif
} cn30xx; } cn30xx;
struct cvmx_l2c_tag_cn31xx { struct cvmx_l2c_tag_cn31xx {
#ifdef __BIG_ENDIAN_BITFIELD __BITFIELD_FIELD(uint64_t reserved:42,
uint64_t reserved:42; __BITFIELD_FIELD(uint64_t V:1, /* Line valid */
uint64_t V:1; /* Line valid */ __BITFIELD_FIELD(uint64_t D:1, /* Line dirty */
uint64_t D:1; /* Line dirty */ __BITFIELD_FIELD(uint64_t L:1, /* Line locked */
uint64_t L:1; /* Line locked */ __BITFIELD_FIELD(uint64_t U:1, /* Use, LRU eviction */
uint64_t U:1; /* Use, LRU eviction */ __BITFIELD_FIELD(uint64_t addr:18, /* Phys addr (33..16) */
uint64_t addr:18; /* Phys mem addr (33..16) */ ;))))))
#else
uint64_t addr:18; /* Phys mem addr (33..16) */
uint64_t U:1; /* Use, LRU eviction */
uint64_t L:1; /* Line locked */
uint64_t D:1; /* Line dirty */
uint64_t V:1; /* Line valid */
uint64_t reserved:42;
#endif
} cn31xx; } cn31xx;
struct cvmx_l2c_tag_cn38xx { struct cvmx_l2c_tag_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD __BITFIELD_FIELD(uint64_t reserved:43,
uint64_t reserved:43; __BITFIELD_FIELD(uint64_t V:1, /* Line valid */
uint64_t V:1; /* Line valid */ __BITFIELD_FIELD(uint64_t D:1, /* Line dirty */
uint64_t D:1; /* Line dirty */ __BITFIELD_FIELD(uint64_t L:1, /* Line locked */
uint64_t L:1; /* Line locked */ __BITFIELD_FIELD(uint64_t U:1, /* Use, LRU eviction */
uint64_t U:1; /* Use, LRU eviction */ __BITFIELD_FIELD(uint64_t addr:17, /* Phys addr (33..17) */
uint64_t addr:17; /* Phys mem addr (33..17) */ ;))))))
#else
uint64_t addr:17; /* Phys mem addr (33..17) */
uint64_t U:1; /* Use, LRU eviction */
uint64_t L:1; /* Line locked */
uint64_t D:1; /* Line dirty */
uint64_t V:1; /* Line valid */
uint64_t reserved:43;
#endif
} cn38xx; } cn38xx;
struct cvmx_l2c_tag_cn58xx { struct cvmx_l2c_tag_cn58xx {
#ifdef __BIG_ENDIAN_BITFIELD __BITFIELD_FIELD(uint64_t reserved:44,
uint64_t reserved:44; __BITFIELD_FIELD(uint64_t V:1, /* Line valid */
uint64_t V:1; /* Line valid */ __BITFIELD_FIELD(uint64_t D:1, /* Line dirty */
uint64_t D:1; /* Line dirty */ __BITFIELD_FIELD(uint64_t L:1, /* Line locked */
uint64_t L:1; /* Line locked */ __BITFIELD_FIELD(uint64_t U:1, /* Use, LRU eviction */
uint64_t U:1; /* Use, LRU eviction */ __BITFIELD_FIELD(uint64_t addr:16, /* Phys addr (33..18) */
uint64_t addr:16; /* Phys mem addr (33..18) */ ;))))))
#else
uint64_t addr:16; /* Phys mem addr (33..18) */
uint64_t U:1; /* Use, LRU eviction */
uint64_t L:1; /* Line locked */
uint64_t D:1; /* Line dirty */
uint64_t V:1; /* Line valid */
uint64_t reserved:44;
#endif
} cn58xx; } cn58xx;
struct cvmx_l2c_tag_cn58xx cn56xx; /* 2048 sets */ struct cvmx_l2c_tag_cn58xx cn56xx; /* 2048 sets */
struct cvmx_l2c_tag_cn31xx cn52xx; /* 512 sets */ struct cvmx_l2c_tag_cn31xx cn52xx; /* 512 sets */
...@@ -629,8 +596,8 @@ static union __cvmx_l2c_tag __read_l2_tag(uint64_t assoc, uint64_t index) ...@@ -629,8 +596,8 @@ static union __cvmx_l2c_tag __read_l2_tag(uint64_t assoc, uint64_t index)
union __cvmx_l2c_tag tag_val; union __cvmx_l2c_tag tag_val;
uint64_t dbg_addr = CVMX_L2C_DBG; uint64_t dbg_addr = CVMX_L2C_DBG;
unsigned long flags; unsigned long flags;
union cvmx_l2c_dbg debug_val; union cvmx_l2c_dbg debug_val;
debug_val.u64 = 0; debug_val.u64 = 0;
/* /*
* For low core count parts, the core number is always small * For low core count parts, the core number is always small
...@@ -683,8 +650,8 @@ static union __cvmx_l2c_tag __read_l2_tag(uint64_t assoc, uint64_t index) ...@@ -683,8 +650,8 @@ static union __cvmx_l2c_tag __read_l2_tag(uint64_t assoc, uint64_t index)
union cvmx_l2c_tag cvmx_l2c_get_tag(uint32_t association, uint32_t index) union cvmx_l2c_tag cvmx_l2c_get_tag(uint32_t association, uint32_t index)
{ {
union cvmx_l2c_tag tag; union cvmx_l2c_tag tag;
tag.u64 = 0;
tag.u64 = 0;
if ((int)association >= cvmx_l2c_get_num_assoc()) { if ((int)association >= cvmx_l2c_get_num_assoc()) {
cvmx_dprintf("ERROR: cvmx_l2c_get_tag association out of range\n"); cvmx_dprintf("ERROR: cvmx_l2c_get_tag association out of range\n");
return tag; return tag;
...@@ -767,10 +734,12 @@ uint32_t cvmx_l2c_address_to_index(uint64_t addr) ...@@ -767,10 +734,12 @@ uint32_t cvmx_l2c_address_to_index(uint64_t addr)
if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {
union cvmx_l2c_ctl l2c_ctl; union cvmx_l2c_ctl l2c_ctl;
l2c_ctl.u64 = cvmx_read_csr(CVMX_L2C_CTL); l2c_ctl.u64 = cvmx_read_csr(CVMX_L2C_CTL);
indxalias = !l2c_ctl.s.disidxalias; indxalias = !l2c_ctl.s.disidxalias;
} else { } else {
union cvmx_l2c_cfg l2c_cfg; union cvmx_l2c_cfg l2c_cfg;
l2c_cfg.u64 = cvmx_read_csr(CVMX_L2C_CFG); l2c_cfg.u64 = cvmx_read_csr(CVMX_L2C_CFG);
indxalias = l2c_cfg.s.idxalias; indxalias = l2c_cfg.s.idxalias;
} }
...@@ -778,6 +747,7 @@ uint32_t cvmx_l2c_address_to_index(uint64_t addr) ...@@ -778,6 +747,7 @@ uint32_t cvmx_l2c_address_to_index(uint64_t addr)
if (indxalias) { if (indxalias) {
if (OCTEON_IS_MODEL(OCTEON_CN63XX)) { if (OCTEON_IS_MODEL(OCTEON_CN63XX)) {
uint32_t a_14_12 = (idx / (CVMX_L2C_MEMBANK_SELECT_SIZE/(1<<CVMX_L2C_IDX_ADDR_SHIFT))) & 0x7; uint32_t a_14_12 = (idx / (CVMX_L2C_MEMBANK_SELECT_SIZE/(1<<CVMX_L2C_IDX_ADDR_SHIFT))) & 0x7;
idx ^= idx / cvmx_l2c_get_num_sets(); idx ^= idx / cvmx_l2c_get_num_sets();
idx ^= a_14_12; idx ^= a_14_12;
} else { } else {
...@@ -801,6 +771,7 @@ int cvmx_l2c_get_cache_size_bytes(void) ...@@ -801,6 +771,7 @@ int cvmx_l2c_get_cache_size_bytes(void)
int cvmx_l2c_get_set_bits(void) int cvmx_l2c_get_set_bits(void)
{ {
int l2_set_bits; int l2_set_bits;
if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX)) if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX))
l2_set_bits = 11; /* 2048 sets */ l2_set_bits = 11; /* 2048 sets */
else if (OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN63XX)) else if (OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN63XX))
...@@ -828,6 +799,7 @@ int cvmx_l2c_get_num_sets(void) ...@@ -828,6 +799,7 @@ int cvmx_l2c_get_num_sets(void)
int cvmx_l2c_get_num_assoc(void) int cvmx_l2c_get_num_assoc(void)
{ {
int l2_assoc; int l2_assoc;
if (OCTEON_IS_MODEL(OCTEON_CN56XX) || if (OCTEON_IS_MODEL(OCTEON_CN56XX) ||
OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN52XX) ||
OCTEON_IS_MODEL(OCTEON_CN58XX) || OCTEON_IS_MODEL(OCTEON_CN58XX) ||
...@@ -869,16 +841,17 @@ int cvmx_l2c_get_num_assoc(void) ...@@ -869,16 +841,17 @@ int cvmx_l2c_get_num_assoc(void)
else if (mio_fus_dat3.s.l2c_crip == 1) else if (mio_fus_dat3.s.l2c_crip == 1)
l2_assoc = 12; l2_assoc = 12;
} else { } else {
union cvmx_l2d_fus3 val; uint64_t l2d_fus3;
val.u64 = cvmx_read_csr(CVMX_L2D_FUS3);
l2d_fus3 = cvmx_read_csr(CVMX_L2D_FUS3);
/* /*
* Using shifts here, as bit position names are * Using shifts here, as bit position names are
* different for each model but they all mean the * different for each model but they all mean the
* same. * same.
*/ */
if ((val.u64 >> 35) & 0x1) if ((l2d_fus3 >> 35) & 0x1)
l2_assoc = l2_assoc >> 2; l2_assoc = l2_assoc >> 2;
else if ((val.u64 >> 34) & 0x1) else if ((l2d_fus3 >> 34) & 0x1)
l2_assoc = l2_assoc >> 1; l2_assoc = l2_assoc >> 1;
} }
return l2_assoc; return l2_assoc;
......
arch/mips/cavium-octeon/executive/octeon-model.c
View file @ 15f68479
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Contact: support@caviumnetworks.com * Contact: support@caviumnetworks.com
* This file is part of the OCTEON SDK * This file is part of the OCTEON SDK
* *
* Copyright (c) 2003-2010 Cavium Networks * Copyright (c) 2003-2017 Cavium, Inc.
* *
* This file is free software; you can redistribute it and/or modify * This file is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, Version 2, as * it under the terms of the GNU General Public License, Version 2, as
...@@ -63,16 +63,15 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id, ...@@ -63,16 +63,15 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id,
char pass[4]; char pass[4];
int clock_mhz; int clock_mhz;
const char *suffix; const char *suffix;
union cvmx_l2d_fus3 fus3;
int num_cores; int num_cores;
union cvmx_mio_fus_dat2 fus_dat2; union cvmx_mio_fus_dat2 fus_dat2;
union cvmx_mio_fus_dat3 fus_dat3; union cvmx_mio_fus_dat3 fus_dat3;
char fuse_model[10]; char fuse_model[10];
uint32_t fuse_data = 0; uint32_t fuse_data = 0;
uint64_t l2d_fus3 = 0;
fus3.u64 = 0;
if (OCTEON_IS_MODEL(OCTEON_CN3XXX) || OCTEON_IS_MODEL(OCTEON_CN5XXX)) if (OCTEON_IS_MODEL(OCTEON_CN3XXX) || OCTEON_IS_MODEL(OCTEON_CN5XXX))
fus3.u64 = cvmx_read_csr(CVMX_L2D_FUS3); l2d_fus3 = (cvmx_read_csr(CVMX_L2D_FUS3) >> 34) & 0x3;
fus_dat2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2); fus_dat2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2);
fus_dat3.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT3); fus_dat3.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT3);
num_cores = cvmx_octeon_num_cores(); num_cores = cvmx_octeon_num_cores();
...@@ -192,7 +191,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id, ...@@ -192,7 +191,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id,
/* Now figure out the family, the first two digits */ /* Now figure out the family, the first two digits */
switch ((chip_id >> 8) & 0xff) { switch ((chip_id >> 8) & 0xff) {
case 0: /* CN38XX, CN37XX or CN36XX */ case 0: /* CN38XX, CN37XX or CN36XX */
if (fus3.cn38xx.crip_512k) { if (l2d_fus3) {
/* /*
* For some unknown reason, the 16 core one is * For some unknown reason, the 16 core one is
* called 37 instead of 36. * called 37 instead of 36.
...@@ -223,7 +222,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id, ...@@ -223,7 +222,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id,
} }
break; break;
case 1: /* CN31XX or CN3020 */ case 1: /* CN31XX or CN3020 */
if ((chip_id & 0x10) || fus3.cn31xx.crip_128k) if ((chip_id & 0x10) || l2d_fus3)
family = "30"; family = "30";
else else
family = "31"; family = "31";
...@@ -246,7 +245,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id, ...@@ -246,7 +245,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id,
case 2: /* CN3010 or CN3005 */ case 2: /* CN3010 or CN3005 */
family = "30"; family = "30";
/* A chip with half cache is an 05 */ /* A chip with half cache is an 05 */
if (fus3.cn30xx.crip_64k) if (l2d_fus3)
core_model = "05"; core_model = "05";
/* /*
* This series of chips didn't follow the standard * This series of chips didn't follow the standard
...@@ -267,7 +266,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id, ...@@ -267,7 +266,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id,
case 3: /* CN58XX */ case 3: /* CN58XX */
family = "58"; family = "58";
/* Special case. 4 core, half cache (CP with half cache) */ /* Special case. 4 core, half cache (CP with half cache) */
if ((num_cores == 4) && fus3.cn58xx.crip_1024k && !strncmp(suffix, "CP", 2)) if ((num_cores == 4) && l2d_fus3 && !strncmp(suffix, "CP", 2))
core_model = "29"; core_model = "29";
/* Pass 1 uses different encodings for pass numbers */ /* Pass 1 uses different encodings for pass numbers */
...@@ -290,7 +289,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id, ...@@ -290,7 +289,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id,
break; break;
case 4: /* CN57XX, CN56XX, CN55XX, CN54XX */ case 4: /* CN57XX, CN56XX, CN55XX, CN54XX */
if (fus_dat2.cn56xx.raid_en) { if (fus_dat2.cn56xx.raid_en) {
if (fus3.cn56xx.crip_1024k) if (l2d_fus3)
family = "55"; family = "55";
else else
family = "57"; family = "57";
...@@ -309,7 +308,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id, ...@@ -309,7 +308,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id,
if (fus_dat3.cn56xx.bar2_en) if (fus_dat3.cn56xx.bar2_en)
suffix = "NSPB2"; suffix = "NSPB2";
} }
if (fus3.cn56xx.crip_1024k) if (l2d_fus3)
family = "54"; family = "54";
else else
family = "56"; family = "56";
...@@ -319,7 +318,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id, ...@@ -319,7 +318,7 @@ static const char *__init octeon_model_get_string_buffer(uint32_t chip_id,
family = "50"; family = "50";
break; break;
case 7: /* CN52XX */ case 7: /* CN52XX */
if (fus3.cn52xx.crip_256k) if (l2d_fus3)
family = "51"; family = "51";
else else
family = "52"; family = "52";
......
arch/mips/include/asm/octeon/cvmx-l2c.h
View file @ 15f68479
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Contact: support@caviumnetworks.com * Contact: support@caviumnetworks.com
* This file is part of the OCTEON SDK * This file is part of the OCTEON SDK
* *
* Copyright (c) 2003-2010 Cavium Networks * Copyright (c) 2003-2017 Cavium, Inc.
* *
* This file is free software; you can redistribute it and/or modify * This file is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, Version 2, as * it under the terms of the GNU General Public License, Version 2, as
...@@ -33,48 +33,39 @@ ...@@ -33,48 +33,39 @@
#ifndef __CVMX_L2C_H__ #ifndef __CVMX_L2C_H__
#define __CVMX_L2C_H__ #define __CVMX_L2C_H__
#define CVMX_L2_ASSOC cvmx_l2c_get_num_assoc() /* Deprecated macro, use function */ #include <uapi/asm/bitfield.h>
#define CVMX_L2_SET_BITS cvmx_l2c_get_set_bits() /* Deprecated macro, use function */
#define CVMX_L2_SETS cvmx_l2c_get_num_sets() /* Deprecated macro, use function */
#define CVMX_L2_ASSOC cvmx_l2c_get_num_assoc() /* Deprecated macro */
#define CVMX_L2_SET_BITS cvmx_l2c_get_set_bits() /* Deprecated macro */
#define CVMX_L2_SETS cvmx_l2c_get_num_sets() /* Deprecated macro */
#define CVMX_L2C_IDX_ADDR_SHIFT 7 /* based on 128 byte cache line size */ /* Based on 128 byte cache line size */
#define CVMX_L2C_IDX_ADDR_SHIFT 7
#define CVMX_L2C_IDX_MASK (cvmx_l2c_get_num_sets() - 1) #define CVMX_L2C_IDX_MASK (cvmx_l2c_get_num_sets() - 1)
/* Defines for index aliasing computations */ /* Defines for index aliasing computations */
#define CVMX_L2C_TAG_ADDR_ALIAS_SHIFT (CVMX_L2C_IDX_ADDR_SHIFT + cvmx_l2c_get_set_bits()) #define CVMX_L2C_TAG_ADDR_ALIAS_SHIFT (CVMX_L2C_IDX_ADDR_SHIFT + \
cvmx_l2c_get_set_bits())
#define CVMX_L2C_ALIAS_MASK (CVMX_L2C_IDX_MASK << CVMX_L2C_TAG_ADDR_ALIAS_SHIFT) #define CVMX_L2C_ALIAS_MASK (CVMX_L2C_IDX_MASK << CVMX_L2C_TAG_ADDR_ALIAS_SHIFT)
#define CVMX_L2C_MEMBANK_SELECT_SIZE 4096 #define CVMX_L2C_MEMBANK_SELECT_SIZE 4096
/* Defines for Virtualizations, valid only from Octeon II onwards. */ /* Number of L2C Tag-and-data sections (TADs) that are connected to LMC. */
#define CVMX_L2C_VRT_MAX_VIRTID_ALLOWED ((OCTEON_IS_MODEL(OCTEON_CN63XX)) ? 64 : 0) #define CVMX_L2C_TADS 1
#define CVMX_L2C_VRT_MAX_MEMSZ_ALLOWED ((OCTEON_IS_MODEL(OCTEON_CN63XX)) ? 32 : 0)
union cvmx_l2c_tag { union cvmx_l2c_tag {
uint64_t u64; uint64_t u64;
struct { struct {
#ifdef __BIG_ENDIAN_BITFIELD __BITFIELD_FIELD(uint64_t reserved:28,
uint64_t reserved:28; __BITFIELD_FIELD(uint64_t V:1,
uint64_t V:1; /* Line valid */ __BITFIELD_FIELD(uint64_t D:1,
uint64_t D:1; /* Line dirty */ __BITFIELD_FIELD(uint64_t L:1,
uint64_t L:1; /* Line locked */ __BITFIELD_FIELD(uint64_t U:1,
uint64_t U:1; /* Use, LRU eviction */ __BITFIELD_FIELD(uint64_t addr:32,
uint64_t addr:32; /* Phys mem (not all bits valid) */ ;))))))
#else
uint64_t addr:32; /* Phys mem (not all bits valid) */
uint64_t U:1; /* Use, LRU eviction */
uint64_t L:1; /* Line locked */
uint64_t D:1; /* Line dirty */
uint64_t V:1; /* Line valid */
uint64_t reserved:28;
#endif
} s; } s;
}; };
/* Number of L2C Tag-and-data sections (TADs) that are connected to LMC. */ /* L2C Performance Counter events. */
#define CVMX_L2C_TADS 1
/* L2C Performance Counter events. */
enum cvmx_l2c_event { enum cvmx_l2c_event {
CVMX_L2C_EVENT_CYCLES = 0, CVMX_L2C_EVENT_CYCLES = 0,
CVMX_L2C_EVENT_INSTRUCTION_MISS = 1, CVMX_L2C_EVENT_INSTRUCTION_MISS = 1,
...@@ -175,7 +166,8 @@ enum cvmx_l2c_tad_event { ...@@ -175,7 +166,8 @@ enum cvmx_l2c_tad_event {
* *
* @note The routine does not clear the counter. * @note The routine does not clear the counter.
*/ */
void cvmx_l2c_config_perf(uint32_t counter, enum cvmx_l2c_event event, uint32_t clear_on_read); void cvmx_l2c_config_perf(uint32_t counter, enum cvmx_l2c_event event,
uint32_t clear_on_read);
/** /**
* Read the given L2 Cache performance counter. The counter must be configured * Read the given L2 Cache performance counter. The counter must be configured
...@@ -307,8 +299,11 @@ int cvmx_l2c_unlock_mem_region(uint64_t start, uint64_t len); ...@@ -307,8 +299,11 @@ int cvmx_l2c_unlock_mem_region(uint64_t start, uint64_t len);
union cvmx_l2c_tag cvmx_l2c_get_tag(uint32_t association, uint32_t index); union cvmx_l2c_tag cvmx_l2c_get_tag(uint32_t association, uint32_t index);
/* Wrapper providing a deprecated old function name */ /* Wrapper providing a deprecated old function name */
static inline union cvmx_l2c_tag cvmx_get_l2c_tag(uint32_t association, uint32_t index) __attribute__((deprecated)); static inline union cvmx_l2c_tag cvmx_get_l2c_tag(uint32_t association,
static inline union cvmx_l2c_tag cvmx_get_l2c_tag(uint32_t association, uint32_t index) uint32_t index)
__attribute__((deprecated));
static inline union cvmx_l2c_tag cvmx_get_l2c_tag(uint32_t association,
uint32_t index)
{ {
return cvmx_l2c_get_tag(association, index); return cvmx_l2c_get_tag(association, index);
} }
......
arch/mips/include/asm/octeon/cvmx-l2d-defs.h deleted 100644 → 0
View file @ 3377e227
This diff is collapsed.
arch/mips/include/asm/octeon/cvmx-l2t-defs.h
View file @ 15f68479
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Contact: support@caviumnetworks.com * Contact: support@caviumnetworks.com
* This file is part of the OCTEON SDK * This file is part of the OCTEON SDK
* *
* Copyright (c) 2003-2012 Cavium Networks * Copyright (c) 2003-2017 Cavium, Inc.
* *
* This file is free software; you can redistribute it and/or modify * This file is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, Version 2, as * it under the terms of the GNU General Public License, Version 2, as
...@@ -28,210 +28,116 @@ ...@@ -28,210 +28,116 @@
#ifndef __CVMX_L2T_DEFS_H__ #ifndef __CVMX_L2T_DEFS_H__
#define __CVMX_L2T_DEFS_H__ #define __CVMX_L2T_DEFS_H__
#include <uapi/asm/bitfield.h>
#define CVMX_L2T_ERR (CVMX_ADD_IO_SEG(0x0001180080000008ull)) #define CVMX_L2T_ERR (CVMX_ADD_IO_SEG(0x0001180080000008ull))
union cvmx_l2t_err { union cvmx_l2t_err {
uint64_t u64; uint64_t u64;
struct cvmx_l2t_err_s { struct cvmx_l2t_err_s {
#ifdef __BIG_ENDIAN_BITFIELD __BITFIELD_FIELD(uint64_t reserved_29_63:35,
uint64_t reserved_29_63:35; __BITFIELD_FIELD(uint64_t fadru:1,
uint64_t fadru:1; __BITFIELD_FIELD(uint64_t lck_intena2:1,
uint64_t lck_intena2:1; __BITFIELD_FIELD(uint64_t lckerr2:1,
uint64_t lckerr2:1; __BITFIELD_FIELD(uint64_t lck_intena:1,
uint64_t lck_intena:1; __BITFIELD_FIELD(uint64_t lckerr:1,
uint64_t lckerr:1; __BITFIELD_FIELD(uint64_t fset:3,
uint64_t fset:3; __BITFIELD_FIELD(uint64_t fadr:10,
uint64_t fadr:10; __BITFIELD_FIELD(uint64_t fsyn:6,
uint64_t fsyn:6; __BITFIELD_FIELD(uint64_t ded_err:1,
uint64_t ded_err:1; __BITFIELD_FIELD(uint64_t sec_err:1,
uint64_t sec_err:1; __BITFIELD_FIELD(uint64_t ded_intena:1,
uint64_t ded_intena:1; __BITFIELD_FIELD(uint64_t sec_intena:1,
uint64_t sec_intena:1; __BITFIELD_FIELD(uint64_t ecc_ena:1,
uint64_t ecc_ena:1; ;))))))))))))))
#else
uint64_t ecc_ena:1;
uint64_t sec_intena:1;
uint64_t ded_intena:1;
uint64_t sec_err:1;
uint64_t ded_err:1;
uint64_t fsyn:6;
uint64_t fadr:10;
uint64_t fset:3;
uint64_t lckerr:1;
uint64_t lck_intena:1;
uint64_t lckerr2:1;
uint64_t lck_intena2:1;
uint64_t fadru:1;
uint64_t reserved_29_63:35;
#endif
} s; } s;
struct cvmx_l2t_err_cn30xx { struct cvmx_l2t_err_cn30xx {
#ifdef __BIG_ENDIAN_BITFIELD __BITFIELD_FIELD(uint64_t reserved_28_63:36,
uint64_t reserved_28_63:36; __BITFIELD_FIELD(uint64_t lck_intena2:1,
uint64_t lck_intena2:1; __BITFIELD_FIELD(uint64_t lckerr2:1,
uint64_t lckerr2:1; __BITFIELD_FIELD(uint64_t lck_intena:1,
uint64_t lck_intena:1; __BITFIELD_FIELD(uint64_t lckerr:1,
uint64_t lckerr:1; __BITFIELD_FIELD(uint64_t reserved_23_23:1,
uint64_t reserved_23_23:1; __BITFIELD_FIELD(uint64_t fset:2,
uint64_t fset:2; __BITFIELD_FIELD(uint64_t reserved_19_20:2,
uint64_t reserved_19_20:2; __BITFIELD_FIELD(uint64_t fadr:8,
uint64_t fadr:8; __BITFIELD_FIELD(uint64_t fsyn:6,
uint64_t fsyn:6; __BITFIELD_FIELD(uint64_t ded_err:1,
uint64_t ded_err:1; __BITFIELD_FIELD(uint64_t sec_err:1,
uint64_t sec_err:1; __BITFIELD_FIELD(uint64_t ded_intena:1,
uint64_t ded_intena:1; __BITFIELD_FIELD(uint64_t sec_intena:1,
uint64_t sec_intena:1; __BITFIELD_FIELD(uint64_t ecc_ena:1,
uint64_t ecc_ena:1; ;)))))))))))))))
#else
uint64_t ecc_ena:1;
uint64_t sec_intena:1;
uint64_t ded_intena:1;
uint64_t sec_err:1;
uint64_t ded_err:1;
uint64_t fsyn:6;
uint64_t fadr:8;
uint64_t reserved_19_20:2;
uint64_t fset:2;
uint64_t reserved_23_23:1;
uint64_t lckerr:1;
uint64_t lck_intena:1;
uint64_t lckerr2:1;
uint64_t lck_intena2:1;
uint64_t reserved_28_63:36;
#endif
} cn30xx; } cn30xx;
struct cvmx_l2t_err_cn31xx { struct cvmx_l2t_err_cn31xx {
#ifdef __BIG_ENDIAN_BITFIELD __BITFIELD_FIELD(uint64_t reserved_28_63:36,
uint64_t reserved_28_63:36; __BITFIELD_FIELD(uint64_t lck_intena2:1,
uint64_t lck_intena2:1; __BITFIELD_FIELD(uint64_t lckerr2:1,
uint64_t lckerr2:1; __BITFIELD_FIELD(uint64_t lck_intena:1,
uint64_t lck_intena:1; __BITFIELD_FIELD(uint64_t lckerr:1,
uint64_t lckerr:1; __BITFIELD_FIELD(uint64_t reserved_23_23:1,
uint64_t reserved_23_23:1; __BITFIELD_FIELD(uint64_t fset:2,
uint64_t fset:2; __BITFIELD_FIELD(uint64_t reserved_20_20:1,
uint64_t reserved_20_20:1; __BITFIELD_FIELD(uint64_t fadr:9,
uint64_t fadr:9; __BITFIELD_FIELD(uint64_t fsyn:6,
uint64_t fsyn:6; __BITFIELD_FIELD(uint64_t ded_err:1,
uint64_t ded_err:1; __BITFIELD_FIELD(uint64_t sec_err:1,
uint64_t sec_err:1; __BITFIELD_FIELD(uint64_t ded_intena:1,
uint64_t ded_intena:1; __BITFIELD_FIELD(uint64_t sec_intena:1,
uint64_t sec_intena:1; __BITFIELD_FIELD(uint64_t ecc_ena:1,
uint64_t ecc_ena:1; ;)))))))))))))))
#else
uint64_t ecc_ena:1;
uint64_t sec_intena:1;
uint64_t ded_intena:1;
uint64_t sec_err:1;
uint64_t ded_err:1;
uint64_t fsyn:6;
uint64_t fadr:9;
uint64_t reserved_20_20:1;
uint64_t fset:2;
uint64_t reserved_23_23:1;
uint64_t lckerr:1;
uint64_t lck_intena:1;
uint64_t lckerr2:1;
uint64_t lck_intena2:1;
uint64_t reserved_28_63:36;
#endif
} cn31xx; } cn31xx;
struct cvmx_l2t_err_cn38xx { struct cvmx_l2t_err_cn38xx {
#ifdef __BIG_ENDIAN_BITFIELD __BITFIELD_FIELD(uint64_t reserved_28_63:36,
uint64_t reserved_28_63:36; __BITFIELD_FIELD(uint64_t lck_intena2:1,
uint64_t lck_intena2:1; __BITFIELD_FIELD(uint64_t lckerr2:1,
uint64_t lckerr2:1; __BITFIELD_FIELD(uint64_t lck_intena:1,
uint64_t lck_intena:1; __BITFIELD_FIELD(uint64_t lckerr:1,
uint64_t lckerr:1; __BITFIELD_FIELD(uint64_t fset:3,
uint64_t fset:3; __BITFIELD_FIELD(uint64_t fadr:10,
uint64_t fadr:10; __BITFIELD_FIELD(uint64_t fsyn:6,
uint64_t fsyn:6; __BITFIELD_FIELD(uint64_t ded_err:1,
uint64_t ded_err:1; __BITFIELD_FIELD(uint64_t sec_err:1,
uint64_t sec_err:1; __BITFIELD_FIELD(uint64_t ded_intena:1,
uint64_t ded_intena:1; __BITFIELD_FIELD(uint64_t sec_intena:1,
uint64_t sec_intena:1; __BITFIELD_FIELD(uint64_t ecc_ena:1,
uint64_t ecc_ena:1; ;)))))))))))))
#else
uint64_t ecc_ena:1;
uint64_t sec_intena:1;
uint64_t ded_intena:1;
uint64_t sec_err:1;
uint64_t ded_err:1;
uint64_t fsyn:6;
uint64_t fadr:10;
uint64_t fset:3;
uint64_t lckerr:1;
uint64_t lck_intena:1;
uint64_t lckerr2:1;
uint64_t lck_intena2:1;
uint64_t reserved_28_63:36;
#endif
} cn38xx; } cn38xx;
struct cvmx_l2t_err_cn38xx cn38xxp2; struct cvmx_l2t_err_cn38xx cn38xxp2;
struct cvmx_l2t_err_cn50xx { struct cvmx_l2t_err_cn50xx {
#ifdef __BIG_ENDIAN_BITFIELD __BITFIELD_FIELD(uint64_t reserved_28_63:36,
uint64_t reserved_28_63:36; __BITFIELD_FIELD(uint64_t lck_intena2:1,
uint64_t lck_intena2:1; __BITFIELD_FIELD(uint64_t lckerr2:1,
uint64_t lckerr2:1; __BITFIELD_FIELD(uint64_t lck_intena:1,
uint64_t lck_intena:1; __BITFIELD_FIELD(uint64_t lckerr:1,
uint64_t lckerr:1; __BITFIELD_FIELD(uint64_t fset:3,
uint64_t fset:3; __BITFIELD_FIELD(uint64_t reserved_18_20:3,
uint64_t reserved_18_20:3; __BITFIELD_FIELD(uint64_t fadr:7,
uint64_t fadr:7; __BITFIELD_FIELD(uint64_t fsyn:6,
uint64_t fsyn:6; __BITFIELD_FIELD(uint64_t ded_err:1,
uint64_t ded_err:1; __BITFIELD_FIELD(uint64_t sec_err:1,
uint64_t sec_err:1; __BITFIELD_FIELD(uint64_t ded_intena:1,
uint64_t ded_intena:1; __BITFIELD_FIELD(uint64_t sec_intena:1,
uint64_t sec_intena:1; __BITFIELD_FIELD(uint64_t ecc_ena:1,
uint64_t ecc_ena:1; ;))))))))))))))
#else
uint64_t ecc_ena:1;
uint64_t sec_intena:1;
uint64_t ded_intena:1;
uint64_t sec_err:1;
uint64_t ded_err:1;
uint64_t fsyn:6;
uint64_t fadr:7;
uint64_t reserved_18_20:3;
uint64_t fset:3;
uint64_t lckerr:1;
uint64_t lck_intena:1;
uint64_t lckerr2:1;
uint64_t lck_intena2:1;
uint64_t reserved_28_63:36;
#endif
} cn50xx; } cn50xx;
struct cvmx_l2t_err_cn52xx { struct cvmx_l2t_err_cn52xx {
#ifdef __BIG_ENDIAN_BITFIELD __BITFIELD_FIELD(uint64_t reserved_28_63:36,
uint64_t reserved_28_63:36; __BITFIELD_FIELD(uint64_t lck_intena2:1,
uint64_t lck_intena2:1; __BITFIELD_FIELD(uint64_t lckerr2:1,
uint64_t lckerr2:1; __BITFIELD_FIELD(uint64_t lck_intena:1,
uint64_t lck_intena:1; __BITFIELD_FIELD(uint64_t lckerr:1,
uint64_t lckerr:1; __BITFIELD_FIELD(uint64_t fset:3,
uint64_t fset:3; __BITFIELD_FIELD(uint64_t reserved_20_20:1,
uint64_t reserved_20_20:1; __BITFIELD_FIELD(uint64_t fadr:9,
uint64_t fadr:9; __BITFIELD_FIELD(uint64_t fsyn:6,
uint64_t fsyn:6; __BITFIELD_FIELD(uint64_t ded_err:1,
uint64_t ded_err:1; __BITFIELD_FIELD(uint64_t sec_err:1,
uint64_t sec_err:1; __BITFIELD_FIELD(uint64_t ded_intena:1,
uint64_t ded_intena:1; __BITFIELD_FIELD(uint64_t sec_intena:1,
uint64_t sec_intena:1; __BITFIELD_FIELD(uint64_t ecc_ena:1,
uint64_t ecc_ena:1; ;))))))))))))))
#else
uint64_t ecc_ena:1;
uint64_t sec_intena:1;
uint64_t ded_intena:1;
uint64_t sec_err:1;
uint64_t ded_err:1;
uint64_t fsyn:6;
uint64_t fadr:9;
uint64_t reserved_20_20:1;
uint64_t fset:3;
uint64_t lckerr:1;
uint64_t lck_intena:1;
uint64_t lckerr2:1;
uint64_t lck_intena2:1;
uint64_t reserved_28_63:36;
#endif
} cn52xx; } cn52xx;
struct cvmx_l2t_err_cn52xx cn52xxp1; struct cvmx_l2t_err_cn52xx cn52xxp1;
struct cvmx_l2t_err_s cn56xx; struct cvmx_l2t_err_s cn56xx;
......
arch/mips/include/asm/octeon/cvmx.h
View file @ 15f68479
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Contact: support@caviumnetworks.com * Contact: support@caviumnetworks.com
* This file is part of the OCTEON SDK * This file is part of the OCTEON SDK
* *
* Copyright (c) 2003-2008 Cavium Networks * Copyright (c) 2003-2017 Cavium, Inc.
* *
* This file is free software; you can redistribute it and/or modify * This file is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, Version 2, as * it under the terms of the GNU General Public License, Version 2, as
...@@ -62,7 +62,6 @@ enum cvmx_mips_space { ...@@ -62,7 +62,6 @@ enum cvmx_mips_space {
#include <asm/octeon/cvmx-iob-defs.h> #include <asm/octeon/cvmx-iob-defs.h>
#include <asm/octeon/cvmx-ipd-defs.h> #include <asm/octeon/cvmx-ipd-defs.h>
#include <asm/octeon/cvmx-l2c-defs.h> #include <asm/octeon/cvmx-l2c-defs.h>
#include <asm/octeon/cvmx-l2d-defs.h>
#include <asm/octeon/cvmx-l2t-defs.h> #include <asm/octeon/cvmx-l2t-defs.h>
#include <asm/octeon/cvmx-led-defs.h> #include <asm/octeon/cvmx-led-defs.h>
#include <asm/octeon/cvmx-mio-defs.h> #include <asm/octeon/cvmx-mio-defs.h>
......
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