Commit 16529509 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'dt-part2-v2-for-v3.18' of...

Merge tag 'dt-part2-v2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Pull "part 2 of omap dts changes" from Tony Lindgren:

Changes to add dra7 PMU, display support for cm-t54, misc
changes needed for omap3 boards for device tree support.
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>

* tag 'dt-part2-v2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: DRA7: Add PMU nodes
  ARM: dts: cm-t54: setup omap_dwc3
  ARM: dts: cm-t54: add ADS7846 touchscreen support
  ARM: dts: cm-t54: add Startek LCD support
  ARM: dts: cm-t54: add HDMI/DVI display data
  ARM: dts: cm-t54: fix mux mode comment style
  ARM: dts: sbc-t54: fix mux mode comment style
  ARM: dts: Enable PMIC idle configuration for LDP
  ARM: dts: Add support for Ethernet on some N900 macro boards
  ARM: dts: Do not set pulls for I2C lines
  ARM: dts: omap: Remove WAKEUPENABLE mux options for UARTs
  ARM: dts: omap3-overo: Fix UART wake-up events
parents 478a4f81 f53e3c53
...@@ -22,4 +22,9 @@ cpu0: cpu@0 { ...@@ -22,4 +22,9 @@ cpu0: cpu@0 {
reg = <0>; reg = <0>;
}; };
}; };
pmu {
compatible = "arm,cortex-a15-pmu";
interrupts = <GIC_SPI DIRECT_IRQ(131) IRQ_TYPE_LEVEL_HIGH>;
};
}; };
...@@ -38,4 +38,10 @@ cpu@1 { ...@@ -38,4 +38,10 @@ cpu@1 {
reg = <1>; reg = <1>;
}; };
}; };
pmu {
compatible = "arm,cortex-a15-pmu";
interrupts = <GIC_SPI DIRECT_IRQ(131) IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI DIRECT_IRQ(132) IRQ_TYPE_LEVEL_HIGH>;
};
}; };
...@@ -174,8 +174,8 @@ &hsusb2_pins ...@@ -174,8 +174,8 @@ &hsusb2_pins
uart3_pins: pinmux_uart3_pins { uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */
>; >;
}; };
......
...@@ -159,6 +159,11 @@ twl: twl@48 { ...@@ -159,6 +159,11 @@ twl: twl@48 {
reg = <0x48>; reg = <0x48>;
interrupts = <7>; /* SYS_NIRQ cascaded to intc */ interrupts = <7>; /* SYS_NIRQ cascaded to intc */
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
twl_power: power {
compatible = "ti,twl4030-power-idle";
ti,use_poweroff;
};
}; };
}; };
......
...@@ -134,24 +134,32 @@ uart3_pins: pinmux_uart3_pins { ...@@ -134,24 +134,32 @@ uart3_pins: pinmux_uart3_pins {
>; >;
}; };
ethernet_pins: pinmux_ethernet_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4) /* gpmc_ncs3.gpio_54 */
OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4) /* dss_data16.gpio_86 */
OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4) /* uart3_rts_sd.gpio_164 */
>;
};
i2c1_pins: pinmux_i2c1_pins { i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
0x18a (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ 0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */ 0x18c (PIN_INPUT | MUX_MODE0) /* i2c1_sda */
>; >;
}; };
i2c2_pins: pinmux_i2c2_pins { i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
0x18e (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */ 0x18e (PIN_INPUT | MUX_MODE0) /* i2c2_scl */
0x190 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */ 0x190 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */
>; >;
}; };
i2c3_pins: pinmux_i2c3_pins { i2c3_pins: pinmux_i2c3_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
0x192 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */ 0x192 (PIN_INPUT | MUX_MODE0) /* i2c3_scl */
0x194 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ 0x194 (PIN_INPUT | MUX_MODE0) /* i2c3_sda */
>; >;
}; };
...@@ -578,6 +586,8 @@ &mmc3 { ...@@ -578,6 +586,8 @@ &mmc3 {
&gpmc { &gpmc {
ranges = <0 0 0x04000000 0x10000000>; /* 256MB */ ranges = <0 0 0x04000000 0x10000000>; /* 256MB */
ranges = <0 0 0x01000000 0x01000000>, /* 16 MB for OneNAND */
<1 0 0x02000000 0x01000000>; /* 16 MB for smc91c96 */
/* gpio-irq for dma: 65 */ /* gpio-irq for dma: 65 */
...@@ -646,6 +656,38 @@ partition@5 { ...@@ -646,6 +656,38 @@ partition@5 {
reg = <0x004c0000 0x0fb40000>; reg = <0x004c0000 0x0fb40000>;
}; };
}; };
ethernet@gpmc {
compatible = "smsc,lan91c94";
interrupt-parent = <&gpio2>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */
reg = <1 0x300 0xf>; /* 16 byte IO range at offset 0x300 */
bank-width = <2>;
pinctrl-names = "default";
pinctrl-0 = <&ethernet_pins>;
gpmc,device-width = <2>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <48>;
gpmc,cs-wr-off-ns = <24>;
gpmc,adv-on-ns = <0>;
gpmc,adv-rd-off-ns = <0>;
gpmc,adv-wr-off-ns = <0>;
gpmc,we-on-ns = <12>;
gpmc,we-off-ns = <18>;
gpmc,oe-on-ns = <12>;
gpmc,oe-off-ns = <48>;
gpmc,page-burst-access-ns = <0>;
gpmc,access-ns = <42>;
gpmc,rd-cycle-ns = <180>;
gpmc,wr-cycle-ns = <180>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wr-access-ns = <0>;
gpmc,wr-data-mux-bus-ns = <12>;
};
}; };
&mcspi1 { &mcspi1 {
......
...@@ -36,8 +36,8 @@ OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */ ...@@ -36,8 +36,8 @@ OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
uart3_pins: pinmux_uart3_pins { uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
>; >;
}; };
}; };
...@@ -88,6 +88,7 @@ &mmc3 { ...@@ -88,6 +88,7 @@ &mmc3 {
}; };
&uart3 { &uart3 {
interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>; pinctrl-0 = <&uart3_pins>;
}; };
......
...@@ -16,6 +16,12 @@ memory { ...@@ -16,6 +16,12 @@ memory {
reg = <0x80000000 0x7F000000>; /* 2048 MB */ reg = <0x80000000 0x7F000000>; /* 2048 MB */
}; };
aliases {
display0 = &hdmi0;
display1 = &dvi0;
display2 = &lcd0;
};
vmmcsd_fixed: fixed-regulator-mmcsd { vmmcsd_fixed: fixed-regulator-mmcsd {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed"; regulator-name = "vmmcsd_fixed";
...@@ -45,6 +51,13 @@ vwlan_fixed: fixed-regulator-vwlan { ...@@ -45,6 +51,13 @@ vwlan_fixed: fixed-regulator-vwlan {
enable-active-high; enable-active-high;
}; };
ads7846reg: ads7846-reg {
compatible = "regulator-fixed";
regulator-name = "ads7846-reg";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
/* HS USB Host PHY on PORT 2 */ /* HS USB Host PHY on PORT 2 */
hsusb2_phy: hsusb2_phy { hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv"; compatible = "usb-nop-xceiv";
...@@ -66,6 +79,105 @@ led@1 { ...@@ -66,6 +79,105 @@ led@1 {
default-state = "off"; default-state = "off";
}; };
}; };
lcd0: display {
compatible = "startek,startek-kd050c", "panel-dpi";
label = "lcd";
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins>;
enable-gpios = <&gpio8 3 GPIO_ACTIVE_HIGH>;
panel-timing {
clock-frequency = <33000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <40>;
hback-porch = <40>;
hsync-len = <43>;
vback-porch = <29>;
vfront-porch = <13>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <1>;
};
port {
lcd_in: endpoint {
remote-endpoint = <&dpi_lcd_out>;
};
};
};
hdmi0: connector@0 {
compatible = "hdmi-connector";
label = "hdmi";
type = "a";
pinctrl-names = "default";
pinctrl-0 = <&hdmi_conn_pins>;
hpd-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; /* GPIO 193, HPD */
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_out>;
};
};
};
tfp410: encoder@0 {
compatible = "ti,tfp410";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
tfp410_in: endpoint@0 {
remote-endpoint = <&dpi_dvi_out>;
};
};
port@1 {
reg = <1>;
tfp410_out: endpoint@0 {
remote-endpoint = <&dvi_connector_in>;
};
};
};
};
dvi0: connector@1 {
compatible = "dvi-connector";
label = "dvi";
digital;
ddc-i2c-bus = <&i2c2>;
port {
dvi_connector_in: endpoint {
remote-endpoint = <&tfp410_out>;
};
};
};
};
&omap5_pmx_wkup {
ads7846_pins: pinmux_ads7846_pins {
pinctrl-single,pins = <
0x02 (PIN_INPUT_PULLDOWN | MUX_MODE6) /* llib_wakereqin.gpio1_wk15 */
>;
};
}; };
&omap5_pmx_core { &omap5_pmx_core {
...@@ -88,6 +200,13 @@ OMAP5_IOPAD(0x01f4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_pmic_sda */ ...@@ -88,6 +200,13 @@ OMAP5_IOPAD(0x01f4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_pmic_sda */
>; >;
}; };
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
OMAP5_IOPAD(0x01b8, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
OMAP5_IOPAD(0x01ba, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
>;
};
mmc1_pins: pinmux_mmc1_pins { mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
OMAP5_IOPAD(0x01e2, PIN_INPUT_PULLUP | MUX_MODE0) /* sdcard_clk */ OMAP5_IOPAD(0x01e2, PIN_INPUT_PULLUP | MUX_MODE0) /* sdcard_clk */
...@@ -127,8 +246,8 @@ OMAP5_IOPAD(0x01ae, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data3 */ ...@@ -127,8 +246,8 @@ OMAP5_IOPAD(0x01ae, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data3 */
wlan_gpios_pins: pinmux_wlan_gpios_pins { wlan_gpios_pins: pinmux_wlan_gpios_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
OMAP5_IOPAD(0x019c, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpio4_109 */ OMAP5_IOPAD(0x019c, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* abemcpdm_ul_data.gpio4_109 */
OMAP5_IOPAD(0x019e, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpio4_110 */ OMAP5_IOPAD(0x019e, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* abemcpdm_dl_data.gpio4_110 */
>; >;
}; };
...@@ -144,6 +263,104 @@ OMAP5_IOPAD(0x00a8, PIN_OUTPUT | MUX_MODE6) /* hsi2_caready.gpio3_76 */ ...@@ -144,6 +263,104 @@ OMAP5_IOPAD(0x00a8, PIN_OUTPUT | MUX_MODE6) /* hsi2_caready.gpio3_76 */
OMAP5_IOPAD(0x00b6, PIN_OUTPUT | MUX_MODE6) /* hsi2_acdata.gpio3_83 */ OMAP5_IOPAD(0x00b6, PIN_OUTPUT | MUX_MODE6) /* hsi2_acdata.gpio3_83 */
>; >;
}; };
dss_hdmi_pins: pinmux_dss_hdmi_pins {
pinctrl-single,pins = <
OMAP5_IOPAD(0x013c, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec */
OMAP5_IOPAD(0x0140, PIN_INPUT | MUX_MODE0) /* hdmi_ddc_scl */
OMAP5_IOPAD(0x0142, PIN_INPUT | MUX_MODE0) /* hdmi_ddc_sda */
>;
};
lcd_pins: pinmux_lcd_pins {
pinctrl-single,pins = <
OMAP5_IOPAD(0x0172, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* timer11_pwm_evt.gpio8_227 */
>;
};
hdmi_conn_pins: pinmux_hdmi_conn_pins {
pinctrl-single,pins = <
OMAP5_IOPAD(0x013e, PIN_INPUT | MUX_MODE6) /* hdmi_hpd.gpio7_193 */
>;
};
dss_dpi_pins: pinmux_dss_dpi_pins {
pinctrl-single,pins = <
OMAP5_IOPAD(0x0104, PIN_OUTPUT | MUX_MODE3) /* rfbi_data15.dispc_data15 */
OMAP5_IOPAD(0x0106, PIN_OUTPUT | MUX_MODE3) /* rfbi_data14.dispc_data14 */
OMAP5_IOPAD(0x0108, PIN_OUTPUT | MUX_MODE3) /* rfbi_data13.dispc_data13 */
OMAP5_IOPAD(0x010a, PIN_OUTPUT | MUX_MODE3) /* rfbi_data12.dispc_data12 */
OMAP5_IOPAD(0x010c, PIN_OUTPUT | MUX_MODE3) /* rfbi_data11.dispc_data11 */
OMAP5_IOPAD(0x010e, PIN_OUTPUT | MUX_MODE3) /* rfbi_data10.dispc_data10 */
OMAP5_IOPAD(0x0110, PIN_OUTPUT | MUX_MODE3) /* rfbi_data9.dispc_data9 */
OMAP5_IOPAD(0x0112, PIN_OUTPUT | MUX_MODE3) /* rfbi_data8.dispc_data8 */
OMAP5_IOPAD(0x0114, PIN_OUTPUT | MUX_MODE3) /* rfbi_data7.dispc_data7 */
OMAP5_IOPAD(0x0116, PIN_OUTPUT | MUX_MODE3) /* rfbi_data6.dispc_data6 */
OMAP5_IOPAD(0x0118, PIN_OUTPUT | MUX_MODE3) /* rfbi_data5.dispc_data5 */
OMAP5_IOPAD(0x011a, PIN_OUTPUT | MUX_MODE3) /* rfbi_data4.dispc_data4 */
OMAP5_IOPAD(0x011c, PIN_OUTPUT | MUX_MODE3) /* rfbi_data3.dispc_data3 */
OMAP5_IOPAD(0x011e, PIN_OUTPUT | MUX_MODE3) /* rfbi_data2.dispc_data2 */
OMAP5_IOPAD(0x0120, PIN_OUTPUT | MUX_MODE3) /* rfbi_data1.dispc_data1 */
OMAP5_IOPAD(0x0122, PIN_OUTPUT | MUX_MODE3) /* rfbi_data0.dispc_data0 */
OMAP5_IOPAD(0x0124, PIN_OUTPUT | MUX_MODE3) /* rfbi_we.dispc_vsync */
OMAP5_IOPAD(0x0126, PIN_OUTPUT | MUX_MODE3) /* rfbi_cs0.dispc_hsync */
OMAP5_IOPAD(0x0128, PIN_OUTPUT | MUX_MODE3) /* rfbi_a0.dispc_de */
OMAP5_IOPAD(0x012a, PIN_OUTPUT | MUX_MODE3) /* rfbi_re.dispc_pclk */
OMAP5_IOPAD(0x012c, PIN_OUTPUT | MUX_MODE3) /* rfbi_hsync0.dispc_data17 */
OMAP5_IOPAD(0x012e, PIN_OUTPUT | MUX_MODE3) /* rfbi_te_vsync0.dispc_data16 */
OMAP5_IOPAD(0x0130, PIN_OUTPUT | MUX_MODE3) /* gpio6_182.dispc_data18 */
OMAP5_IOPAD(0x0132, PIN_OUTPUT | MUX_MODE3) /* gpio6_183.dispc_data19 */
OMAP5_IOPAD(0x0134, PIN_OUTPUT | MUX_MODE3) /* gpio6_184.dispc_data20 */
OMAP5_IOPAD(0x0136, PIN_OUTPUT | MUX_MODE3) /* gpio6_185.dispc_data21 */
OMAP5_IOPAD(0x0138, PIN_OUTPUT | MUX_MODE3) /* gpio6_186.dispc_data22 */
OMAP5_IOPAD(0x013a, PIN_OUTPUT | MUX_MODE3) /* gpio6_187.dispc_data23 */
>;
};
mcspi2_pins: pinmux_mcspi1_pins {
pinctrl-single,pins = <
OMAP5_IOPAD(0x00fc, PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
OMAP5_IOPAD(0x00fe, PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
OMAP5_IOPAD(0x0100, PIN_INPUT | MUX_MODE0) /* mcspi2_somi */
OMAP5_IOPAD(0x0102, PIN_INPUT | MUX_MODE0) /* mcspi2_cs0 */
>;
};
};
&mcspi2 {
pinctrl-names = "default";
pinctrl-0 = <&mcspi2_pins>;
/* touch controller */
ads7846@0 {
pinctrl-names = "default";
pinctrl-0 = <&ads7846_pins>;
compatible = "ti,ads7846";
vcc-supply = <&ads7846reg>;
reg = <0>; /* CS0 */
spi-max-frequency = <1500000>;
interrupt-parent = <&gpio1>;
interrupts = <15 0>; /* gpio1_wk15 */
pendown-gpio = <&gpio1 15 0>;
ti,x-min = /bits/ 16 <0x0>;
ti,x-max = /bits/ 16 <0x0fff>;
ti,y-min = /bits/ 16 <0x0>;
ti,y-max = /bits/ 16 <0x0fff>;
ti,x-plate-ohms = /bits/ 16 <180>;
ti,pressure-max = /bits/ 16 <255>;
ti,debounce-max = /bits/ 16 <30>;
ti,debounce-tol = /bits/ 16 <10>;
ti,debounce-rep = /bits/ 16 <1>;
linux,wakeup;
};
}; };
&mmc1 { &mmc1 {
...@@ -399,6 +616,13 @@ regen3_reg: regen3 { ...@@ -399,6 +616,13 @@ regen3_reg: regen3 {
}; };
}; };
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
clock-frequency = <100000>;
};
&usbhshost { &usbhshost {
port2-mode = "ehci-hsic"; port2-mode = "ehci-hsic";
port3-mode = "ehci-hsic"; port3-mode = "ehci-hsic";
...@@ -408,6 +632,50 @@ &usbhsehci { ...@@ -408,6 +632,50 @@ &usbhsehci {
phys = <0 &hsusb2_phy &hsusb3_phy>; phys = <0 &hsusb2_phy &hsusb3_phy>;
}; };
&usb3 {
extcon = <&extcon_usb3>;
vbus-supply = <&smps10_out1_reg>;
};
&cpu0 { &cpu0 {
cpu0-supply = <&smps123_reg>; cpu0-supply = <&smps123_reg>;
}; };
&dss {
status = "ok";
pinctrl-names = "default";
pinctrl-0 = <&dss_dpi_pins>;
port {
dpi_dvi_out: endpoint@0 {
remote-endpoint = <&tfp410_in>;
data-lines = <24>;
};
dpi_lcd_out: endpoint@1 {
remote-endpoint = <&lcd_in>;
data-lines = <24>;
};
};
};
&dsi2 {
status = "ok";
vdd-supply = <&ldo4_reg>;
};
&hdmi {
status = "ok";
vdda-supply = <&ldo4_reg>;
pinctrl-names = "default";
pinctrl-0 = <&dss_hdmi_pins>;
port {
hdmi_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
lanes = <1 0 3 2 5 4 7 6>;
};
};
};
...@@ -19,8 +19,8 @@ OMAP5_IOPAD(0x00fa, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */ ...@@ -19,8 +19,8 @@ OMAP5_IOPAD(0x00fa, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */
mmc1_aux_pins: pinmux_mmc1_aux_pins { mmc1_aux_pins: pinmux_mmc1_aux_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
OMAP5_IOPAD(0x0174, PIN_INPUT_PULLUP | MUX_MODE6) /* gpio8_228 */ OMAP5_IOPAD(0x0174, PIN_INPUT_PULLUP | MUX_MODE6) /* timer5_pwm_evt.gpio8_228 */
OMAP5_IOPAD(0x0176, PIN_INPUT_PULLUP | MUX_MODE6) /* gpio8_229 */ OMAP5_IOPAD(0x0176, PIN_INPUT_PULLUP | MUX_MODE6) /* timer6_pwm_evt.gpio8_229 */
>; >;
}; };
}; };
......
...@@ -252,6 +252,9 @@ static void __init nokia_n900_legacy_init(void) ...@@ -252,6 +252,9 @@ static void __init nokia_n900_legacy_init(void)
platform_device_register(&omap3_rom_rng_device); platform_device_register(&omap3_rom_rng_device);
} }
/* Only on some development boards */
gpio_request_one(164, GPIOF_OUT_INIT_LOW, "smc91x reset");
} }
static void __init omap3_tao3530_legacy_init(void) static void __init omap3_tao3530_legacy_init(void)
......
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