Commit 16804d68 authored by Uwe Kleine-König's avatar Uwe Kleine-König Committed by Greg Kroah-Hartman

serial: imx: make sure unhandled irqs are disabled

Make sure that events that are not handled in the irq function don't
trigger an interrupt.

When the serial port is operated in DTE mode, the events for DCD and RI
events are enabled after a system reset by default.
Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 4d845a62
...@@ -1224,11 +1224,32 @@ static int imx_startup(struct uart_port *port) ...@@ -1224,11 +1224,32 @@ static int imx_startup(struct uart_port *port)
temp |= (UCR2_RXEN | UCR2_TXEN); temp |= (UCR2_RXEN | UCR2_TXEN);
if (!sport->have_rtscts) if (!sport->have_rtscts)
temp |= UCR2_IRTS; temp |= UCR2_IRTS;
/*
* make sure the edge sensitive RTS-irq is disabled,
* we're using RTSD instead.
*/
if (!is_imx1_uart(sport))
temp &= ~UCR2_RTSEN;
writel(temp, sport->port.membase + UCR2); writel(temp, sport->port.membase + UCR2);
if (!is_imx1_uart(sport)) { if (!is_imx1_uart(sport)) {
temp = readl(sport->port.membase + UCR3); temp = readl(sport->port.membase + UCR3);
temp |= IMX21_UCR3_RXDMUXSEL | UCR3_ADNIMP;
/*
* The effect of RI and DCD differs depending on the UFCR_DCEDTE
* bit. In DCE mode they control the outputs, in DTE mode they
* enable the respective irqs. At least the DCD irq cannot be
* cleared on i.MX25 at least, so it's not usable and must be
* disabled. I don't have test hardware to check if RI has the
* same problem but I consider this likely so it's disabled for
* now, too.
*/
temp |= IMX21_UCR3_RXDMUXSEL | UCR3_ADNIMP |
UCR3_RI | UCR3_DCD;
if (sport->dte_mode)
temp &= ~(UCR3_RI | UCR3_DCD);
writel(temp, sport->port.membase + UCR3); writel(temp, sport->port.membase + UCR3);
} }
......
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