Commit 16e5294e authored by Robert Richter's avatar Robert Richter Committed by Ingo Molnar

perf, x86: Force IBS LVT offset assignment for family 10h

On AMD family 10h we see firmware bug messages like the following:

 [Firmware Bug]: cpu 6, try to use APIC500 (LVT offset 0) for vector 0x10400, but the register is already in use for vector 0xf9 on another cpu
 [Firmware Bug]: cpu 6, IBS interrupt offset 0 not available (MSRC001103A=0x0000000000000100)
 [Firmware Bug]: using offset 1 for IBS interrupts
 [Firmware Bug]: workaround enabled for IBS LVT offset
 perf: AMD IBS detected (0x00000007)

We always see this, since the offsets are not assigned by the BIOS for
this family. Force LVT offset assignment in this case. If the OS
assignment fails, fallback to BIOS settings and try to setup this.

The fallback to BIOS settings weakens the family check since
force_ibs_eilvt_setup() may fail e.g. in case of virtual machines.
But setup may still succeed if BIOS offsets are correct.

Other families don't have a workaround implemented that assigns LVT
offsets. It's ok, to drop calling force_ibs_eilvt_setup() for that
families.

With the patch the [Firmware Bug] messages vanish. We see now:

 IBS: LVT offset 1 assigned
 perf: AMD IBS detected (0x00000007)
Signed-off-by: default avatarRobert Richter <robert.richter@amd.com>
Signed-off-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/20111109162225.GO12451@erda.amd.comSigned-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 6a600a8b
...@@ -199,8 +199,7 @@ static int force_ibs_eilvt_setup(void) ...@@ -199,8 +199,7 @@ static int force_ibs_eilvt_setup(void)
goto out; goto out;
} }
pr_err(FW_BUG "using offset %d for IBS interrupts\n", offset); pr_info("IBS: LVT offset %d assigned\n", offset);
pr_err(FW_BUG "workaround enabled for IBS LVT offset\n");
return 0; return 0;
out: out:
...@@ -265,19 +264,23 @@ perf_ibs_cpu_notifier(struct notifier_block *self, unsigned long action, void *h ...@@ -265,19 +264,23 @@ perf_ibs_cpu_notifier(struct notifier_block *self, unsigned long action, void *h
static __init int amd_ibs_init(void) static __init int amd_ibs_init(void)
{ {
u32 caps; u32 caps;
int ret; int ret = -EINVAL;
caps = __get_ibs_caps(); caps = __get_ibs_caps();
if (!caps) if (!caps)
return -ENODEV; /* ibs not supported by the cpu */ return -ENODEV; /* ibs not supported by the cpu */
if (!ibs_eilvt_valid()) { /*
ret = force_ibs_eilvt_setup(); * Force LVT offset assignment for family 10h: The offsets are
if (ret) { * not assigned by the BIOS for this family, so the OS is
pr_err("Failed to setup IBS, %d\n", ret); * responsible for doing it. If the OS assignment fails, fall
return ret; * back to BIOS settings and try to setup this.
} */
} if (boot_cpu_data.x86 == 0x10)
force_ibs_eilvt_setup();
if (!ibs_eilvt_valid())
goto out;
get_online_cpus(); get_online_cpus();
ibs_caps = caps; ibs_caps = caps;
...@@ -287,7 +290,11 @@ static __init int amd_ibs_init(void) ...@@ -287,7 +290,11 @@ static __init int amd_ibs_init(void)
smp_call_function(setup_APIC_ibs, NULL, 1); smp_call_function(setup_APIC_ibs, NULL, 1);
put_online_cpus(); put_online_cpus();
return perf_event_ibs_init(); ret = perf_event_ibs_init();
out:
if (ret)
pr_err("Failed to setup IBS, %d\n", ret);
return ret;
} }
/* Since we need the pci subsystem to init ibs we can't do this earlier: */ /* Since we need the pci subsystem to init ibs we can't do this earlier: */
......
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